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Course contents

  • How to Use This Course
  • Reading Paths
  • Concept Map
  • Meet DCRouter
  • Glossary
  • Part 0: What Verification Is8
  • Part 1: What Can Go Wrong11
  • Part 2: Specifications as Checkable Rules8
  • Part 3: Observability and Controllability7
    • Controllability
    • Observability
    • Bug Propagation and Masking
    • Black Box, White Box, Grey Box
    • Hooks and Test Modes
    • Design for Verification
    • Drills: Observability and Controllability
  • Part 4: Stimulus11
  • Part 5: Checking11
  • Part 6: Coverage10
  • Part 7: Formal and Simulation10
  • Part 8: Verification Levels and Reuse8
  • Part 9: Planning and Risk9
  • Part 10: Emulation and Prototyping8
  • Part 11: Post-Silicon Validation8
  • Part 12: Bug Economics8
  • Part 13: Debug7
  • Part 14: Sign-Off7
  • Part 15: Verification in Context8
  • Part 16: Case Studies5
  • Part 17: Capstones5
  • Part 18: Interview Preparation6
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‹First Principles of Verification Strategy
  1. Topics
  2. First Principles of Verification Strategy
  3. Part 3: Observability and Controllability

Part 3 · Observability and Controllability · All levels

Part 3: Observability and Controllability

Can we see and steer what matters? Explain activation, propagation and detection.

  • 7topics
  • 7lessons
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    Part 3 answers: Can we see and steer what matters?

    Where Part 3 sits among the sixteen questions of the course.

    A test finds a bug only if three things happen: the stimulus activates it, the wrong value propagates somewhere visible, and a check notices. Controllability is the ability to drive the design into the state you need; observability is the ability to see a wrong value when it appears.

    This part explains why a test can trigger a bug and still pass, the trade-off between black-box and white-box checking, the power and danger of backdoors and test modes, and what designers can do to make verification cheaper.

    After this part you can

    • Explain activation, propagation and detection.

    • Diagnose why a test that hit a bug still passed.

    • Decide where checks should look inside a design and what hooks to ask designers for.

    Warm-up: three questions from Part 2

    Answer each in your head before opening it. If two or more feel shaky, revisit Part 2: Specifications as Checkable Rules first.

    Check yourself What is the oracle problem?

    Every check needs something that knows the correct answer; building and trusting that oracle is often the hardest part.

    Check yourself Why number specification rules?

    So each rule maps to a check, a coverage point and a result, and disagreements can be pinned to a rule.

    Check yourself Can a checker be too strict?

    Yes: one that forbids behaviour the specification allows fails legal designs and wastes debug time.

    Lessons

    #

    Lesson

    Level

    Status

    3.1

    Controllability

    W · Working

    Ready

    3.2

    Observability

    W · Working

    Ready

    3.3

    Bug Propagation and Masking

    S · Senior

    Ready

    3.4

    Black Box, White Box, Grey Box

    W · Working

    Ready

    3.5

    Hooks and Test Modes

    S · Senior

    Ready

    3.6

    Design for Verification

    P · Principal

    Ready

    —

    Drills and checkpoint

    all levels

    Ready

    Every lesson in this part is ready. Work through them in order: each one sets up the problem the next one solves.

    Where other courses go deeper

    This course teaches the decisions behind verification. These lessons teach the tools and syntax that carry them out, so this part links to them instead of repeating them.

    • SystemVerilog course: Bind Checkers

    • DFT course: Scan Fundamentals

    Related topics

    • Course hub

    • Previous: Part 2 · Specifications as Checkable Rules

    • Next: Part 4 · Stimulus

    PreviousNext: Controllability

    Up next

    Up nextControllability

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    See also

    • How to Use This Course
    • Reading Paths
    • Concept Map