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Course contents

  • How to Use This Course
  • Reading Paths
  • Concept Map
  • Meet DCRouter
  • Glossary
  • Part 0: What Verification Is8
  • Part 1: What Can Go Wrong11
  • Part 2: Specifications as Checkable Rules8
  • Part 3: Observability and Controllability7
  • Part 4: Stimulus11
  • Part 5: Checking11
  • Part 6: Coverage10
  • Part 7: Formal and Simulation10
  • Part 8: Verification Levels and Reuse8
  • Part 9: Planning and Risk9
  • Part 10: Emulation and Prototyping8
  • Part 11: Post-Silicon Validation8
  • Part 12: Bug Economics8
  • Part 13: Debug7
  • Part 14: Sign-Off7
  • Part 15: Verification in Context8
    • Functional Safety Verification
    • Security Verification
    • Low-Power Verification Strategy
    • CDC and RDC in the Plan
    • Verifying Processors
    • Verifying AI Accelerators
    • Verifying Configurable IP
    • Drills: Verification in Context
  • Part 16: Case Studies5
  • Part 17: Capstones5
  • Part 18: Interview Preparation6
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‹First Principles of Verification Strategy
  1. Topics
  2. First Principles of Verification Strategy
  3. Part 15: Verification in Context

Part 15 · Verification in Context · All levels

Part 15: Verification in Context

What changes for safety, security, processors and AI hardware? Explain how functional safety changes verification goals.

  • 8topics
  • 8lessons
On this page

    Part 15 answers: What changes for safety, security, processors and AI hardware?

    Where Part 15 sits among the sixteen questions of the course.

    The principles stay the same, but some domains change the questions. Safety standards ask how faults are detected, not just whether the design is correct; security asks what must never happen; processors and AI accelerators have enormous input spaces and their own oracles.

    This part covers functional-safety verification, security verification, low-power and CDC in the plan, processors, AI accelerators and highly configurable IP.

    After this part you can

    • Explain how functional safety changes verification goals.

    • Plan verification for a security property.

    • Choose an oracle and strategy for a processor or an AI accelerator.

    Warm-up: three questions from Part 14

    Answer each in your head before opening it. If two or more feel shaky, revisit Part 14: Sign-Off first.

    Check yourself What does sign-off mean?

    A decision to accept the remaining risk, based on stated evidence; not a certificate that there are no bugs.

    Check yourself When is a waiver acceptable?

    When the gap is understood, its risk is assessed and accepted by the right people, and it is recorded.

    Check yourself What belongs in a residual-risk statement?

    What was not verified or only partly verified, why, the likely impact, and any mitigation.

    Lessons

    #

    Lesson

    Level

    Status

    15.1

    Functional Safety Verification

    P · Principal

    Ready

    15.2

    Security Verification

    P · Principal

    Ready

    15.3

    Low-Power Verification Strategy

    S · Senior

    Ready

    15.4

    CDC and RDC in the Plan

    S · Senior

    Ready

    15.5

    Verifying Processors

    P · Principal

    Ready

    15.6

    Verifying AI Accelerators

    P · Principal

    Ready

    15.7

    Verifying Configurable IP

    P · Principal

    Ready

    —

    Drills and checkpoint

    all levels

    Ready

    Every lesson in this part is ready. Work through them in order: each one sets up the problem the next one solves.

    Where other courses go deeper

    This course teaches the decisions behind verification. These lessons teach the tools and syntax that carry them out, so this part links to them instead of repeating them.

    • Low-power verification course

    • CDC and RDC course

    • DFT course

    Related topics

    • Course hub

    • Previous: Part 14 · Sign-Off

    • Next: Part 16 · Case Studies

    PreviousNext: Functional Safety Verification

    Up next

    Up nextFunctional Safety Verification

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    See also

    • How to Use This Course
    • Reading Paths
    • Concept Map