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Course contents

  • How to Use This Course
  • Reading Paths
  • Concept Map
  • Meet DCRouter
  • Glossary
  • Part 0: What Verification Is8
  • Part 1: What Can Go Wrong11
    • A Taxonomy of Bugs
    • Specification Bugs
    • Corner Cases and Boundaries
    • Concurrency and Races
    • Integration and Interface Bugs
    • Configuration and Mode Bugs
    • Performance Bugs
    • Reset, Clock and Power Bugs
    • Where Bugs Hide
    • Classifying the Bug Zoo
    • Drills: What Can Go Wrong
  • Part 2: Specifications as Checkable Rules8
  • Part 3: Observability and Controllability7
  • Part 4: Stimulus11
  • Part 5: Checking11
  • Part 6: Coverage10
  • Part 7: Formal and Simulation10
  • Part 8: Verification Levels and Reuse8
  • Part 9: Planning and Risk9
  • Part 10: Emulation and Prototyping8
  • Part 11: Post-Silicon Validation8
  • Part 12: Bug Economics8
  • Part 13: Debug7
  • Part 14: Sign-Off7
  • Part 15: Verification in Context8
  • Part 16: Case Studies5
  • Part 17: Capstones5
  • Part 18: Interview Preparation6
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‹Part 1: What Can Go Wrong
  1. Topics
  2. First Principles of Verification Strategy
  3. Part 1: What Can Go Wrong
  4. Drills: What Can Go Wrong

Part 1 · What Can Go Wrong · All levels

Drills: What Can Go Wrong

Interview questions, a whiteboard exercise and a ten-question checkpoint for Part 1.

On this page

    Answer each question out loud before opening it. If you miss more than three in the checkpoint, revisit the lessons linked at the end.

    Interview questions

    Check yourself What kinds of bugs are there?

    Specification, corner case and boundary, concurrency and race, integration, configuration and mode, performance and fairness, reset/clock/power, error handling; each hides in a different place and needs a different technique.

    Check yourself How do you find bugs in the specification?

    Treat it as something to verify: writing checks forces precision, independent readings disagree, and every question is filed and answered in writing; validation catches specifications that are precise but wrong.

    Check yourself Where would you look first for bugs in a FIFO?

    At full, empty, wrap-around and simultaneous push and pop at each limit.

    Check yourself Give an example of a concurrency bug.

    A counter that treats push and pop in the same cycle as a push, drifting under streaming traffic.

    Check yourself Why do integration bugs escape block testing?

    Each block is tested against stand-ins encoding the verifier's assumptions about its neighbours.

    Check yourself How do you verify a configurable IP?

    Randomise run-time setup, cover configuration values and pairs, choose parameter builds with a covering array, and test every shipped configuration.

    Check yourself How do you find a performance bug?

    Specify throughput, latency and fairness; drive saturating traffic; measure and assert the numbers.

    Check yourself What bugs does RTL simulation miss?

    Reset and X problems, clock-domain crossings, and power-state behaviour without power-aware simulation.

    Whiteboard exercise

    Task. A new block is a 4-port, 2-priority arbiter with a credit-based output, a register block and a sleep mode. List the bug classes it can contain, where each would hide in this block, and the technique you would use for each.

    Check yourself Open a model answer

    Corner cases: credits at zero and at maximum, pointer wrap, longest request burst; biased random plus formal on the credit counter. Concurrency: grant in the same cycle as release, credit return with a send, request arriving as it sleeps; random timing and back-pressure, cross coverage, formal. Configuration: priority enabled and disabled, ports disabled; randomised register setup and configuration coverage. Performance: starvation of a low-priority or high-numbered requester, credit leaks; fairness and throughput monitors, bounded-wait assertions. Registers: reset values, counters, clear behaviour; directed register tests. Reset: initial credits and pointers; reset-value checks and reset mid-traffic. Low power: sleep with a grant in flight, wake from every input, credits during sleep; idle-and-wake scenarios with power-aware simulation. Specification: what fairness means exactly, behaviour of a disabled requester mid-request; questions filed before tests are written.

    Checkpoint: ten questions

    Check yourself 1. Which class can functional checks never see?

    Performance and fairness.

    Check yourself 2. Name the four ways a specification fails.

    Wrong, ambiguous, incomplete, contradictory.

    Check yourself 3. In the FIFO waveform, why did test A pass?

    It never filled the FIFO, so the off-by-one full comparison never mattered.

    Check yourself 4. In the counter waveform, what did count read after the FIFO emptied?

    4, although the FIFO was empty.

    Check yourself 5. What makes a good stand-in model of a neighbour?

    Behaviour as aggressive as the specification allows, not the polite behaviour of one real neighbour.

    Check yourself 6. How many builds cover all pairs of four 4-valued parameters?

    16 (an orthogonal array), against 256 for every combination.

    Check yourself 7. Under heavy load, what share did the stuck-pointer arbiter give requester 0?

    90%; requesters 2 and 3 got nothing.

    Check yourself 8. Why can't plain RTL simulation find metastability bugs?

    It does not model metastability; crossings need structural CDC analysis.

    Check yourself 9. What predicts where bugs hide?

    Novelty, complexity, change, boundaries and history.

    Check yourself 10. How many DCRouter bugs are low-power bugs, and why does continuous traffic miss them?

    Three; DCRouter sleeps only after 8 idle cycles.

    Revisit

    • 1.1 A Taxonomy of Bugs

    • 1.2 Specification Bugs

    • 1.3 Corner Cases and Boundaries

    • 1.4 Concurrency and Races

    • 1.5 Integration and Interface Bugs

    • 1.6 Configuration and Mode Bugs

    • 1.7 Performance Bugs

    • 1.8 Reset, Clock and Power Bugs

    • 1.9 Where Bugs Hide

    • 1.10 Classifying the Bug Zoo

    Keep going

    Next: Part 2: Specifications as Checkable Rules. What exactly are we checking against?

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    See also

    • A Taxonomy of Bugs
    • Specification Bugs
    • Corner Cases and Boundaries