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Course contents

  • How to Use This Course
  • Reading Path
  • Cache Coherency Glossary
  • The Shared Course Model
  • Cache Coherency Revision Sheet
  • Why Coherence Exists8
  • States and Protocols12
  • Transactions12
  • Races and Controller Design8
  • Progress and the Fabric16
  • Ordering and Synchronization12
    • Memory Models and Protocols
    • Barriers, Fences and Completions
      • Fences Are Not Flushes
      • Acquire and Release
      • Atomics and RMW at the Cache
      • Completion Versus Visibility
    • Speculation, Replay and Recovery
  • Performance and Scalability12
  • Real Protocols12
  • SoC Integration12
  • Power, Clocking and Reliability12
  • Verification12
  • Debug and Bring-up12
  • Interview and Design Review17
  • Capstone: A Coherent Model Lab5
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‹Ordering and Synchronization
  1. Topics
  2. Cache Coherency
  3. Ordering and Synchronization
  4. Barriers, Fences and Completions

Part 6 · Ordering and Synchronization · All levels

Barriers, Fences and Completions

Define ordering, publication, atomicity and completion without calling every operation a cache flush.

  • 4topics
  • 4lessons

A barrier name is not a complete specification. Ask which operations it orders, its shareability domain (the set of agents the ordering applies to), and what completion event it requires. Work these lessons after the SC/TSO examples, keeping per-location coherence separate from architecture and language contracts.

Lesson

After it you can...

Fences Are Not Flushes

Order operations without requiring clean cache lines.

Acquire and Release

Identify which release the acquire must read from.

Atomics and RMW at the Cache

Preserve indivisibility as exclusive permission moves.

Completion Versus Visibility

Name exactly what each observed completion establishes.

Suggested order: fence scope, publication, atomic update, then completion evidence.

Check yourself Does a completed fence universally mean memory contains every dirty cache value?

No. Ordering and cache cleaning have different contracts. A coherent dirty cache can remain the authoritative source after an ordering requirement has been satisfied.

Related topics

  • Shared course model

  • Prerequisite: memory models

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See also

  • Memory Models and Protocols
  • Speculation, Replay and Recovery