Skip to content
DenseChip
Learn
PracticeCode labInterview

DenseChip

Navigate

Menu

LearnPracticeCode labInterview

Tools

All toolsSV editorCode repoResume
DenseChip

Practice, courses, and chip-design tools in one focused workspace.

LearnPracticeCode labInterviewToolsLearning paths

© 2026 DenseChip

AboutContactPrivacyTerms
Skip to lesson

Course contents

  • How to Use This Course
  • Reading Path
  • CDC/RDC Glossary
  • CDC/RDC Metrics Reference
  • CDC/RDC Interview Prep
  • CDC/RDC Signoff Cheatsheet
  • Clock Domains and Failure Modes8
  • Metastability and Synchronizers16
  • CDC Protocols and Handshakes16
  • Reconvergence and Gray Coding16
  • Reset Domain Crossing16
  • Architecture and Design Rules16
    • CDC-Aware Partitioning
    • Clock Gating and Muxing
    • Interface and IP Rules
    • Quasi-Static Signals and Configuration
      • Static by Construction
      • Qualification and Stability
      • Constraints and Waiver Hygiene
      • Runtime Reconfiguration
  • CDC Signoff Methodology24
  • RDC Signoff16
  • Debug and Case Studies11
  • CDC and RDC Interview Prep30
  • Capstone: Sign Off a Multi-clock Peripheral4
Loading lesson

‹Quasi-Static Signals and Configuration
  1. Topics
  2. CDC & RDC
  3. Architecture and Design Rules
  4. Quasi-Static Signals and Configuration
  5. Runtime Reconfiguration

Part 6 · Architecture and Design Rules · Intermediate

Runtime Reconfiguration

Changing configuration while running; safe sequencing patterns.

On this page

    Some configuration cannot wait for a mode change: link speeds renegotiate, filters retune, features switch on live traffic. Runtime reconfiguration accepts that the value will change under a running datapath and makes the change atomic and ordered instead of pretending it is static.

    Safe sequencing patterns

    Pattern

    How it works

    When it fits

    Drain and update

    Quiesce the affected path briefly (drain, update, restart) like a miniature mode change.

    Updates that tolerate a short pause; the honest version of “write it live”.

    Shadow with atomic commit

    Software writes a shadow copy over many cycles; one synced load pulse swaps the whole live value at once.

    Wide values that must never tear; see the config pattern.

    Double-buffered swap

    Two live banks; the datapath reads one while software fills the other, then a single bit flips the active bank.

    Large tables where even a one-cycle commit window is too disruptive.

    Version-guarded read

    Each value carries a sequence count; the consumer reads twice and accepts the value only if the count matches. The count is itself a crossing: it must cross through a synchroniser (or be Gray-coded) and updates must be spaced so that the double read is valid.

    Read-mostly status and tuning where an occasional retry is cheaper than a handshake.

    All four share one property: at no instant does the consumer see a mixture of old and new. Drain-and-update separates them in time; the other three separate them in space (two copies) with a single-bit commit.

    What must also hold

    • The commit itself (load pulse, bank bit, valid flag) is a crossing and gets the full synchroniser treatment; an atomic commit delivered by a torn pulse is not atomic.

    • Partial programming is fenced: the consumer cannot select a bank that software is still filling. A “bank ready” handshake or a fill-then-commit order enforced in hardware closes this.

    • Read-modify-write from software targets the shadow, never the live copy; writing the live copy directly reintroduces tearing one field at a time.

    How to verify it

    Randomise the update timing against live traffic in simulation: commit at every phase of the datapath, including mid-packet, and check that each transaction uses wholly-old or wholly-new configuration. Assert the commit pulse spacing the synchroniser needs, and cover the fill-then-commit order with a sequence that tries to violate it.

    Common pitfall

    Updating a table entry by entry “because each write is atomic”. Each write is atomic; the table is not. A consumer reading between two writes sees a half-new table. Accumulate in a shadow or an inactive bank and commit once.

    Check yourself A 64-tap filter updates one tap per cycle in the live bank while filtering continues. Measurements occasionally glitch. Why does per-tap atomicity not save it?

    Because correctness needs the whole set of taps to be consistent, not each tap individually. Between tap writes the filter mixes old and new coefficients. Accumulate the set in a shadow bank and swap atomically.

    Related topics

    • Static by Construction

    • Async Interfaces: Config and Status

    Previous

    94 / 179

    Next: CDC Signoff Methodology

    Up next

    Up nextCDC Signoff Methodology

    Sign in to save progress

    Practice this lessonReport an error

    See also

    • Static by Construction
    • Qualification and Stability