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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
    • Handle and Copy Puzzles
    • Virtual Method Puzzles
      • Non-Virtual vs Virtual Through Base Handle
      • Missing super.new with Required Base Args
      • Virtual Call from Base Constructor
      • Signature Mismatch Prevents Override
      • Template Method with Non-Virtual Wrapper
      • super Method Call in Override Chain
    • Parameterized Class Puzzles
    • Factory Override Puzzles
    • OOP & Testbench Puzzles: Tricky Q&A
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹OOP & Testbench Puzzles
  1. Topics
  2. DV Interview Puzzles
  3. OOP & Testbench Puzzles
  4. Virtual Method Puzzles

VLSI DV Interview Puzzles · All levels

Virtual Method Puzzles

These puzzles target dispatch rules that break real UVM frameworks where most handles are typed as base classes. You are expected to distinguish static binding, dynamic dispatch, and constructor-chain behavior (`super.new`) without guessing.

  • 6topics
  • 6lessons

Topics in this section

  1. 1Non-Virtual vs Virtual Through Base Handle1 lesson
  2. 2Missing super.new with Required Base Args1 lesson
  3. 3Virtual Call from Base Constructor1 lesson
  4. 4Signature Mismatch Prevents Override1 lesson
  5. 5Template Method with Non-Virtual Wrapper1 lesson
  6. 6super Method Call in Override Chain1 lesson
On this page

    About this puzzle set

    These puzzles target dispatch rules that break real UVM frameworks where most handles are typed as base classes. You are expected to distinguish static binding, dynamic dispatch, and constructor-chain behavior (`super.new`) without guessing.

    Puzzles in this topic

    Diagram
    1. Non-Virtual vs Virtual Through Base Handle  [Easy]
    2. Missing super.new with Required Base Args  [Medium]
    3. Virtual Call from Base Constructor  [Hard]
    4. Signature Mismatch Prevents Override  [Medium]
    5. Template Method with Non-Virtual Wrapper  [Easy]
    6. super Method Call in Override Chain  [Hard]

    Work each puzzle before reading the solution: predict the exact output or answer, name the rule that governs it, then check yourself.

    fork/join variants and completion semantics

    Diagram
    FORK/JOIN INTERVIEW CHEAT MAP
    
    fork
      task_a();   // 3 cycles
      task_b();   // 1 cycle
    join
    --> parent waits for all children
    
    fork ... join_any
    --> parent continues after first child completes
    
    fork ... join_none
    --> parent continues immediately; children run detached
    
    Use wait fork; later to synchronize detached threads.

    Related topics

    • OOP & Testbench Puzzles section

    • VLSI DV Interview Puzzles hub

    PreviousNext: Non-Virtual vs Virtual Through Base Handle

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    Up nextNon-Virtual vs Virtual Through Base Handle

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    See also

    • Handle and Copy Puzzles
    • Parameterized Class Puzzles
    • Factory Override Puzzles