VLSI DV Interview Puzzles · All levels
Factory Override Puzzles
These puzzles test exact UVM factory behavior under competing overrides and mixed object creation styles. You must reason about precedence, path specificity, timing of override registration, and the critical difference between `create()` and direct `new()`.
About this puzzle set
These puzzles test exact UVM factory behavior under competing overrides and mixed object creation styles. You must reason about precedence, path specificity, timing of override registration, and the critical difference between `create()` and direct `new()`.
Puzzles in this topic
diagram
1. Type Override vs Instance Override Specificity [Medium]
2. create() Honors Override, new() Bypasses [Easy]
3. Replace Flag in Repeated set_type_override [Medium]
4. Wildcard Instance Path Precedence [Hard]
5. Component Override in build_phase [Medium]
6. Override Timing Relative to create Calls [Hard]Work each puzzle before reading the solution: predict the exact output or answer, name the rule that governs it, then check yourself.
fork/join variants and completion semantics
diagram
FORK/JOIN INTERVIEW CHEAT MAP
fork
task_a(); // 3 cycles
task_b(); // 1 cycle
join
--> parent waits for all children
fork ... join_any
--> parent continues after first child completes
fork ... join_none
--> parent continues immediately; children run detached
Use wait fork; later to synchronize detached threads.