After the design freeze, and worse after tapeout, every fix is an engineering change with a price: a metal-only tweak that rewires or stitches spare gates, an all-layer change, or a full respin that repeats the whole flow. The decision is economic and technical at once, and it is made under schedule pressure with incomplete information, which is exactly when a standing policy earns its keep. This topic is that policy for NanoSoC: how to think about the two costs, what discipline every late change follows, and what the spare cells buy. Its one job is the change after the freeze; the bugs that survive despite it belong to the errata topic.
Lesson | After it you can... |
|---|---|
Cost an ECO against an all-layer change and a respin in effort, mask and fab time. | |
Shepherd a late change through reason, proof and re-verification. | |
Say what the spare cells cover and prove the hookup in RTL. |
Suggested order: top to bottom. Cost first, because discipline without pricing is nagging; then the process every change follows; then the spare gates that keep small fixes small. The implementation-side flow this governs is Post-Mask ECO Flow, and the proof each ECO owes is Proving an ECO: Equivalence and Gate-Level Simulation.
Because the question is not how to edit but whether the change is worth its re-verification: risk against the frozen baseline. Only the integrator sees both sides of that trade.