Some bugs survive everything: they slip through verification, hide from the dashboard, and appear on the bench with silicon in hand. The errata process is how the project handles them honestly instead of quietly: each surviving bug becomes a documented erratum with a workaround, a severity, and a fix planned for the next chip. This topic runs that process on NanoSoC, and it carries the same habit as the memory-map contract: the driver rules ship with the register headers. Its one job is life after tapeout; pricing the silicon fix is the ECO topic behind it.
Lesson | After it you can... |
|---|---|
Write an erratum record the checker accepts. | |
Write a driver workaround and prove it with a model. | |
Turn errata into design rules the next chip inherits. |
Suggested order: top to bottom. Recording first, because a workaround for an unrecorded bug is folklore; then the workaround discipline; then the feedback loop that repays the whole exercise. The owner-course reference throughout is Errata and Workarounds, with the silicon-debug method in Escape Analysis.
Because the workaround is load-bearing: future drivers, future chips and future engineers all need to know the hardware is at fault. An unrecorded workaround looks like pointless code and gets optimised away.