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Course contents

  • How to Use This Course
  • Reading Paths
  • Concept Map
  • Meet DCRouter
  • Glossary
  • Part 0: What Verification Is8
  • Part 1: What Can Go Wrong11
  • Part 2: Specifications as Checkable Rules8
  • Part 3: Observability and Controllability7
  • Part 4: Stimulus11
  • Part 5: Checking11
  • Part 6: Coverage10
  • Part 7: Formal and Simulation10
  • Part 8: Verification Levels and Reuse8
  • Part 9: Planning and Risk9
  • Part 10: Emulation and Prototyping8
  • Part 11: Post-Silicon Validation8
    • Pre-Silicon and Post-Silicon
    • Validation Strategy
    • Observability in Silicon
    • Debugging Silicon Failures
    • Margins and Characterisation
    • Errata and Workarounds
    • Closing the Loop
    • Drills: Post-Silicon Validation
  • Part 12: Bug Economics8
  • Part 13: Debug7
  • Part 14: Sign-Off7
  • Part 15: Verification in Context8
  • Part 16: Case Studies5
  • Part 17: Capstones5
  • Part 18: Interview Preparation6
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‹Part 11: Post-Silicon Validation
  1. Topics
  2. First Principles of Verification Strategy
  3. Part 11: Post-Silicon Validation
  4. Errata and Workarounds

Part 11 · Post-Silicon Validation · Principal (P)

Errata and Workarounds

A bug found in silicon can be fixed with a new mask set, fixed more cheaply in the metal layers, worked around in software or firmware, avoided by configuration, or documented as an erratum. The choice weighs the bug's impact, how many customers meet it, the cost and delay of each fix, and the risk of the fix itself. A decision procedure, applied to three DCRouter silicon bugs.

On this page

    Note

    Level: Principal (P) · Answers: What do we do when the chip comes back?

    Before this: Margins and Characterisation, The Cost of an Escape

    Silicon validation finds three DCRouter bugs in the first month. In one, the router can fall asleep with an output locked if a source pauses mid-packet. In another, writing ERR_CNT0 clears all four error counters. In the third, a disabled port still accepts traffic. All three are real; none needs the same response. One may need a mask change, one a line in the driver, one a sentence in a document.

    How do you decide whether to respin, work around, or document?

    The obvious answer, and why it breaks

    The obvious instincts are "fix everything" (a new mask set costs months and a great deal of money, and introduces its own risk) and "work around everything in software" (some bugs cannot be avoided by software, and some workarounds cost customers performance or features). The decision is a trade-off, made bug by bug, with the cost of each option written down.

    The idea: five responses

    Response

    When it fits

    Cost and risk

    Full respin (new mask set)

    Serious bugs with no acceptable workaround; many bugs batched together

    Months; high cost; new silicon must be validated again

    Metal-layer change (ECO)

    Fixes that spare gates or simple rewiring can make

    Weeks; lower cost; limited to what spare cells allow

    Software or firmware workaround

    The bug can be avoided by a sequence, a delay, a setting or a retry

    Cheap and fast; may cost performance; every user's software must apply it

    Configuration restriction

    Avoid a mode or feature that triggers the bug

    Cheap; removes capability

    Erratum only

    Rare, low impact, or outside normal use

    Cheapest; customers must read and accept it

    Deciding: the questions

    • Impact: data corruption, hang, security exposure, or cosmetic? Silent or detected?

    • Exposure: how many customers and use cases meet it, and how often?

    • Workaround: does one exist, is it complete, what does it cost, can every user apply it?

    • Fix cost and timing: respin or ECO cost, schedule, and the validation it needs.

    • Batching: if a respin is needed anyway, which other bugs ride along?

    Three DCRouter silicon bugs, decided (illustrative)

    Bug

    Impact

    Workaround

    Decision

    Sleeps with an output locked (BUG_20's class)

    Packets corrupted after idle gaps mid-packet; silent

    Disable low power (lp_en = 0), costing idle power

    Workaround now (lp_en off in the driver); metal fix in the next stepping

    ERR_CNT0 write clears all four (BUG_19's class)

    Error statistics lost; no data corruption

    Driver reads all four counters before clearing any

    Driver workaround plus erratum; no hardware fix

    Disabled port still accepts traffic (BUG_23's class)

    Traffic from a port meant to be off; possible security concern if ports isolate tenants

    None complete in software if the sender is untrusted

    Fix in the next stepping; erratum and guidance for affected configurations until then

    How real teams handle errata

    Practice

    Purpose

    An errata review board with design, validation, software and business

    Decisions balance technical and commercial costs

    Published errata documents per silicon stepping

    Customers know the limitations and workarounds

    Workarounds implemented in the reference software

    Customers get them by default

    Bugs batched into steppings

    One respin fixes many issues

    What breaks

    A team (illustrative) documented a cache-coherence bug as an erratum with a software workaround: flush a buffer before a particular DMA sequence. One major customer's operating system did not apply the workaround in one rarely used path, and field data corruption followed. A workaround is only as good as the guarantee that every user's software applies it; for silent data corruption that guarantee is rarely good enough.

    Why this matters

    Principal lens. Decide each silicon bug on impact, exposure, workaround quality and fix cost, with all of them written down. Prefer hardware fixes for silent corruption and security exposure, software workarounds for bugs with reliable, complete avoidance, and errata for rare, low-impact behaviour. Batch hardware fixes into steppings, and never treat an erratum as free.

    Interview

    Asked: "How do you decide whether to respin?"

    Weak answer: Respin if it's a real bug.

    Strong answer: Bug by bug, on impact, exposure, workaround and cost. Silent data corruption, hangs without recovery and security exposures with no complete workaround push toward hardware fixes, ideally a metal ECO if spare cells allow, or a respin that batches several fixes. Bugs avoidable by a reliable software sequence or configuration get workarounds built into the reference software, plus an erratum. Rare, low-impact behaviour gets an erratum only. The risk of the fix itself, and re-validating new silicon, are part of the cost.

    Follow-ups: (1) When is a software workaround not enough? (2) What is a metal ECO?

    Check yourself Why is a driver workaround acceptable for the ERR_CNT clear bug but not for the disabled-port bug?

    The counter bug loses statistics and can be avoided completely by the driver's own sequence; the port bug can be triggered by an untrusted sender, which software on the receiving side cannot prevent.

    Check yourself What is the hidden cost of a software workaround?

    Every user's software must apply it in every path; any path that misses it exposes the bug, and the workaround may cost performance or features.

    Key takeaways

    • Silicon bugs get a respin, a metal fix, a software workaround, a configuration restriction or an erratum.

    • Decide on impact, exposure, workaround quality and fix cost, bug by bug.

    • Prefer hardware fixes for silent corruption and security; never treat errata as free.

    Keep going

    Next: Lesson 11.7, Closing the Loop. Every escape becomes a test, a check and a plan change.

    Related topics

    • Part 11 overview: Post-Silicon Validation

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    Next: Closing the Loop

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    Up nextClosing the Loop

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    See also

    • Pre-Silicon and Post-Silicon
    • Validation Strategy
    • Observability in Silicon