Every failed review fails the same way: an owner presents effort instead of evidence, the room debates the summary, and the decision rests on confidence rather than checks. The fix is a standing list of what each owner brings, in what form, against which baseline, published before the meeting so gaps are found by the checklist rather than by argument. This lesson is that list for NanoSoC. Its one job is the inputs; the rule applied to them is next.
Each owner brings results on the signoff candidate, never summaries. A real chip's owners bring the artefacts below. NanoSoC as specified defines the budgets and the reset and power sequences but no corner set, no layout results and no package or ballout (the pads and the crystal sit outside the top), so the matrix is a template listing the artefact each owner would attach, with the NanoSoC figures to check wherever the course defines them.
Timing brings worst slack per corner and mode with the exception review signed; for NanoSoC that means the 192, 96 and 24 MHz domains and the asynchronous boundaries between them, with the corner list coming from the process (illustrative here).
Power brings intent-clean reports plus the power-aware simulation that switched the domain off and back, covering the 2.917 us power-down and the 14.073 us wake.
Physical brings the DRC and LVS counts with waived cells listed (a real chip's artefact; the course defines no layout results).
Crossings bring zero opens against the ten-group inventory, the reset order among them.
Verification brings the top-level coverage with the boot to 12.581 ms, the 64-word DMA self-test, the interrupt latency bounds of 135.4 to 182.3 ns, and the power-state walk all passing.
Software brings the driver rules the results depend on: start with 0x3, clear both DONE and ERR, wait while busy before touching length or key.
Package and board bring the ballout, the reset-state pin table and the power sequence the silicon will actually see (template row: for NanoSoC the attachable artefacts are the reset and power sequences).
# The evidence matrix: every owner has a row, every row names the
# candidate and the artefact. Missing, stale or summary-only rows are
# refused. Candidate labels are illustrative.
CAND = "214/n88/gds-31" # rtl / netlist / layout of the signoff candidate
OWNERS = ["timing", "power", "physical", "crossings", "verification",
"software", "package-board"]
def refused(evidence):
out = []
names = [row[0] for row in evidence]
for owner in OWNERS:
if owner not in names:
out.append((owner, "no row"))
for owner, artefact, cand, present in evidence:
if not present:
out.append((owner, "absent"))
elif not artefact:
out.append((owner, "summary without artefact"))
elif cand != CAND:
out.append((owner, "stale"))
return out
draft = [
("timing", "slack+exceptions", CAND, True),
("power", "intent+pa-sim", CAND, True),
("physical", "drc+lvs", "214/n87/gds-30", True), # old candidate
("crossings", "cdc+rdc zero", CAND, True),
("verification", "coverage+must-pass", CAND, True),
("software", "driver rules signed", CAND, False), # not delivered
] # package-board missing
assert refused(draft) == [("package-board", "no row"),
("physical", "stale"),
("software", "absent")], refused(draft)
fixed = [
("timing", "slack+exceptions", CAND, True),
("power", "intent+pa-sim", CAND, True),
("physical", "drc+lvs", CAND, True),
("crossings", "cdc+rdc zero", CAND, True),
("verification", "coverage+must-pass", CAND, True),
("software", "driver rules signed", CAND, True),
("package-board", "pin-states+power-sequence", CAND, True),
]
assert refused(fixed) == []
assert refused(fixed[:-1] + [("package-board", "", CAND, True)]) == [
("package-board", "summary without artefact")]
print("PASS: draft refused on 3 rows; fixed matrix has 7 owners, 7 artefacts")The matrix above, filled, published a day before the meeting, with every artefact retrievable from the manifest.
No row whose artefact is a slide: waveforms, logs, signed exception lists, or it does not count.
Software evidence present even though software is not taped: the results depend on driver rules, so the rules are evidence.
Audit one artefact per owner before the meeting: open the timing exception list and read three entries against the RTL, replay the wake sequence from the power log, check the interrupt latency numbers against the 135.4 and 182.3 ns bounds. Audits done early turn the meeting into confirmation; audits skipped turn it into discovery, which is the most expensive place to discover anything.
No. Block coverage is the wrong artefact and the boot test is stale. The row needs top-level coverage with must-pass tests on the frozen baseline; anything else is effort, not evidence.