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Course contents

  • Logic Synthesis Glossary
  • Logic Synthesis Cheatsheet
  • Synthesis Foundations14
  • Logic Optimisation and Mapping20
  • Constraints and Timing15
  • Sequential, FSM and Memory19
  • Datapath Synthesis14
    • Adders and Carry Structures
    • Multipliers and Compressors
    • Resource Sharing and Arithmetic Inference
      • ALU Inference and alumacc
      • Sharing Adders and the Mux Cost
      • wreduce and Operator Widths
      • Constant Multipliers and Carry Tricks
  • Area, Power and Test14
  • Verification, ECO and Handoff15
  • Flows and Debugging15
  • Interview and Judgment11
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‹Resource Sharing and Arithmetic Inference
  1. Topics
  2. Logic Synthesis
  3. Datapath Synthesis
  4. Resource Sharing and Arithmetic Inference
  5. Constant Multipliers and Carry Tricks

Part 5 · Datapath Synthesis · Intermediate

Constant Multipliers and Carry Tricks

Shift-add for constant products and free carry-in arithmetic.

On this page

    Constants are shifts and adds

    A constant shift is rewiring, so it costs nothing. A constant product becomes a few shifts plus adds.

    Each extra 1 in the binary constant costs about one more adder. Sparse constants are nearly free.

    Constant

    Shift-add form

    Operators

    x3

    (a<<1) + a

    1 add.

    x5

    (a<<2) + a

    1 add.

    x7

    (a<<3) - a

    1 subtract.

    x11

    (a<<3) + (a<<1) + a

    2 adds.

    x13

    (a<<3) + (a<<2) + a

    2 adds.

    Carry-in tricks

    Subtraction reuses addition as a + ~b + 1. The 1 arrives as the carry-in, so no extra adder is needed.

    The same carry-in gives increments and decrements for free. Tie one addend to zero and drive the carry-in with the 1.

    Diagram
    8-bit example: a = 61, b = 27
    bitwise NOT of b within 8 bits: 255 - 27 = 228
    a - b as addition: 61 + 228 + 1 = 290; 290 - 256 = 34; check 61 - 27 = 34
    carry out is 1 because 290 >= 256, so a < b (unsigned) is false
    increment through the carry-in: 61 + 0 + 1 = 62 with B tied to 0

    Width pitfalls of shifts

    A left shift widens the value: a shifted by 3 needs 3 more bits. Storing back into the original width silently drops the top bits.

    Size the whole adder chain for the widest shifted term. Then wreduce trims whatever the result keeps.

    Common pitfall

    A shift left past the kept width drops the carry that an ordering check needs. Keep the full shifted width through the subtract, and slice only the final kept bits.

    A runnable shift-add proof

    The program below checks x13 shift-add against multiplication on all 256 byte values. It also proves the subtract and carry rules on all 65536 operand pairs.

    example.py
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    import sys
    
    def adds_for_const(n):
        return bin(n).count("1") - 1
    
    bad = 0
    for a in range(256):
        if ((a << 3) + (a << 2) + a) != 13 * a:
            bad = bad + 1
        if (((a << 3) + (a << 2) + a) & 0xFF) != (13 * a) & 0xFF:
            bad = bad + 1
    for a in range(256):
        for b in range(256):
            s = a + (b ^ 0xFF) + 1
            if (s & 0xFF) != (a - b) & 0xFF:
                bad = bad + 1
            carry = s >> 8
            if carry != (0 if a < b else 1):
                bad = bad + 1
    if adds_for_const(13) != 2:
        bad = bad + 1
    
    if bad != 0:
        print("FAIL: " + str(bad) + " bad cases")
        sys.exit(1)
    
    print("PASS: shift-add matches multiply on 256 cases and carry rules hold on 65536 cases")

    Interview

    Likely probes: costing a constant product, and reading a subtract from its carry.

    • Count ones in the constant: each extra one is about one more adder.

    • Subtraction is addition with an inverted subtrahend and carry-in 1.

    • Unsigned a < b is the inverted carry out of a + ~b + 1.

    Check yourself Write x13 in shift-add form. How many adders does it need?

    (a<<3) + (a<<2) + a, which needs 2 adders. The constant has three ones, so two additions combine them.

    Check yourself With a = 61 and b = 27, what is the carry out of a + ~b + 1, and what does it say about 61 < 27?

    The carry out is 1, since the 9-bit sum is 290. A carry of 1 means a >= b, so 61 < 27 is false.

    Related topics

    • wreduce and operator widths

    • Multipliers and Compressors

    • Comparators and Shifters

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    See also

    • ALU Inference and alumacc
    • Sharing Adders and the Mux Cost