A senior DV loop is five or six conversations, and each one grades something different. The concept round wants the mechanism behind objections and the factory. The coding round wants a scoreboard on a whiteboard in twenty minutes. The debug round hands you the tail of a log. The architecture round gives you a block you have never seen and asks how you would verify it. The behavioural round asks what you did when a designer said your checker was wrong. Engineers with eight years of experience rarely fail on knowledge. They fail because they prepared for one kind of round and met another.
This topic is organised by round type. Every model answer leans on something the course actually built and ran: the DMA bench, its broken variants and its real logs. The timed practice lives in the separate UVM Coding Practice course, and this bank links to it instead of repeating it.
Name the rounds of a senior loop and what each interviewer writes down.
Answer the concept questions in mechanism-first form, with the follow-ups ready.
Write a scoreboard, monitor, driver loop, register adapter or virtual sequence in twenty minutes, while saying the right things.
Read a failing log aloud: what happened, what you check next, and what you would change so it cannot happen again.
Design the verification for a subsystem, an AXI interconnect or a cache controller on a whiteboard, using one reusable answer structure.
Tell ownership, conflict and failure stories with numbers and a changed process at the end.
Lesson | Round | What it trains | Time |
|---|---|---|---|
All | What a 4–6 round loop looks like, a 2-week and a 2-day prep plan, how strong candidates still fail | 15 min | |
Concepts | Mechanism-first answers with follow-ups | 15 min | |
Concepts | Mechanism-first answers with follow-ups | 15 min | |
Concepts | Mechanism-first answers with follow-ups | 15 min | |
Concepts | Mechanism-first answers with follow-ups | 15 min | |
Concepts | Mechanism-first answers with follow-ups | 15 min | |
Concepts | Mechanism-first answers with follow-ups | 15 min | |
Coding | Scoreboard, monitor, driver loop, adapter and virtual sequence in 20 minutes each | 25 min | |
Debug | Six real failing logs from the bench, read the way an interviewer wants | 25 min | |
Architecture | A two-DMA subsystem, an AXI interconnect and a cache controller | 25 min | |
Architecture | Coverage holes, a red regression before tape-out, and "how do you know you are done" | 20 min | |
Behavioural | Ownership, conflict, prioritisation, failure and mentoring, with model answers | 20 min | |
All | About 60 common senior questions, each linked to its home lesson | Reference |
The two courses have different jobs. This bank teaches the reasoning: why a strong answer is strong, on a bench you know end to end. UVM Coding Practice is the gym: short drills on one skill each, broken testbenches to fix, and five full mock interviews with a clock. Read the bank page for a round first, then go and do its drills under time pressure.
Round | Learn the answer here | Practise under the clock |
|---|---|---|
Concepts | The six concept-round pages | Tricky Q&A pages at the end of each drill section |
Coding | Whiteboard framework, then the scoreboard, monitor/driver and RAL drills | |
Debug | ||
Architecture | ||
Full loop |
The Senior DV Interview Loop, for its 2-day plan. It tells you which rounds to rehearse aloud (debug and architecture, which reward practice most) and which to skim (concepts you already use daily).
Because the debug round is graded on reading real output: exact message IDs, timestamps and counts. Invented logs teach you to pattern-match on tidy text. The bench logs carry the details an interviewer probes, such as why a hang prints eight errors and then goes quiet.