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Course contents

  • How to Use This Course
  • Reading Paths
  • Concept Map
  • Meet DCRouter
  • Glossary
  • Part 0: What Verification Is8
  • Part 1: What Can Go Wrong11
  • Part 2: Specifications as Checkable Rules8
  • Part 3: Observability and Controllability7
  • Part 4: Stimulus11
  • Part 5: Checking11
  • Part 6: Coverage10
  • Part 7: Formal and Simulation10
  • Part 8: Verification Levels and Reuse8
  • Part 9: Planning and Risk9
  • Part 10: Emulation and Prototyping8
    • Why Cycles Matter
    • Simulation Speed and Its Limits
    • Emulation
    • FPGA Prototyping
    • Virtual Platforms and Hybrids
    • Debug at Scale
    • Choosing the Platform
    • Drills: Emulation and Prototyping
  • Part 11: Post-Silicon Validation8
  • Part 12: Bug Economics8
  • Part 13: Debug7
  • Part 14: Sign-Off7
  • Part 15: Verification in Context8
  • Part 16: Case Studies5
  • Part 17: Capstones5
  • Part 18: Interview Preparation6
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‹Part 10: Emulation and Prototyping
  1. Topics
  2. First Principles of Verification Strategy
  3. Part 10: Emulation and Prototyping
  4. Debug at Scale

Part 10 · Emulation and Prototyping · Senior (S)

Debug at Scale

On an emulator or prototype a failure may appear after billions of cycles, and nobody can record every signal for that long. Debug at scale means detecting the failure close to its cause, capturing a short window around it, and reproducing it on a slower platform with more visibility. Triggers, assertions in hardware, checkpoints and replay, applied to a DCRouter hang seen during an OS boot.

On this page

    Note

    Level: Senior (S) · Answers: How do we run enough cycles?

    Before this: Virtual Platforms and Hybrids

    During an OS boot on the emulator, network traffic stops after about 3 billion cycles. The software log shows a driver timeout. Somewhere, perhaps billions of cycles earlier, something went wrong in DCRouter, a DMA engine or the driver. Recording every signal of the chip for 3 billion cycles is impossible, and re-running the boot to look takes about 50 minutes each time. Debug at this scale is a search problem.

    How do you debug a failure that appears after billions of cycles?

    The obvious answer, and why it breaks

    The obvious approach is simulation-style debug: dump the waves and look. At emulator scale, full waveforms for billions of cycles are far beyond any storage, and the failure's cause may be long before its symptom. The strategy has to be: detect as close to the cause as possible, capture only a window around it, and move the window to a platform where full visibility is affordable.

    The idea: detect early, capture a window, replay slowly

    Technique

    What it does

    DCRouter hang example

    Assertions in hardware

    Synthesised checkers fire in the cycle a rule breaks

    DCRouter's R13 wake assertion (lesson 5.3) fires the moment an input fails to wake the router

    Triggers and trace buffers

    Record a window of chosen signals around a trigger condition

    Trigger on the assertion; capture 10,000 cycles of DCRouter's pins before it

    Monitors and transaction logs

    Record transactions, not signals, for the whole run

    A log of every packet in and out of DCRouter shows the last ones before traffic stopped

    Checkpoints (save and restore)

    Save the full state periodically; restore near the failure

    Restore a checkpoint taken 50 million cycles before the hang instead of rebooting

    Replay on a slower platform

    Move the state or the stimulus window to simulation for full visibility

    Run the last few thousand cycles in simulation with all signals dumped

    Bisection

    Narrow the failing window by re-running from checkpoints

    Find the first checkpoint after which the hang is inevitable

    Why block-level checkers pay off here

    Every checker carried up from block level (lesson 8.3) turns a vague software timeout into a precise event. In the opening story, with DCRouter's assertions synthesised onto the emulator, the failure would have been reported as "R13: in_vld 1000 did not wake the router" at the cycle it happened, perhaps billions of cycles before the driver noticed. Without them, the team starts from the timeout and searches backwards.

    Planning debug before the run

    • Decide what to capture: interface transactions everywhere, signals only around triggers.

    • Synthesise the assertions and route their failures to triggers.

    • Checkpoint regularly on long runs, so any failure can be revisited from nearby.

    • Keep runs reproducible: the same software, seeds and stimulus, so a failure can be re-run.

    How real teams debug at scale

    Practice

    Purpose

    Synthesisable assertions and monitors on emulators

    Failures detected at the cause

    Deep trace buffers with complex triggers

    Windows of full visibility exactly where needed

    Save and restore with replay in simulation

    Full waveforms for the critical cycles only

    Transaction-level logging of every interface

    A complete, compact history to search

    What breaks

    A team (illustrative) spent two weeks on an emulator hang by rebooting the OS each time with a different set of signals captured, hoping to catch the cause. Each attempt cost over an hour and saw a few hundred signals. A synthesised assertion on the deadlocked interface, plus checkpoints every 100 million cycles, would have pinned the failing cycle on the first run and allowed a full replay in simulation from the nearest checkpoint.

    Why this matters

    Senior lens. Plan debug for long runs before the run: synthesised assertions as triggers, transaction logs everywhere, trace windows around triggers, regular checkpoints and replay into simulation. At billions of cycles, the difference between detecting at the cause and detecting at the symptom is days of debug.

    Interview

    Asked: "How do you debug on an emulator?"

    Weak answer: Dump the waveforms and look at them.

    Strong answer: Detect early, capture a window, replay slowly. Synthesised assertions and monitors fire at the cycle a rule breaks and act as triggers; trace buffers capture a window of signals around the trigger; transaction logs record every interface compactly for the whole run; regular checkpoints let me restore close to the failure instead of re-running billions of cycles; and the critical window is replayed in simulation with full visibility. Block-level checkers carried up are what turn a software timeout into a precise, early event.

    Follow-ups: (1) Why not dump everything? (2) How do checkpoints help bisection?

    Check yourself Why does a synthesised R13 wake assertion shorten the debug of the boot hang so much?

    It reports the exact rule and cycle when the router fails to wake, instead of the driver's timeout, possibly billions of cycles later.

    Check yourself What does a checkpoint 50 million cycles before the hang save?

    Restoring it avoids re-running the first 3 billion cycles of the boot for each debug attempt.

    Key takeaways

    • At billions of cycles, debug is a search: detect early, capture a window, replay slowly.

    • Synthesised assertions, trace triggers, transaction logs and checkpoints make it possible.

    • Block-level checkers carried to the emulator turn software symptoms into precise causes.

    Keep going

    Next: Lesson 10.7, Choosing the Platform. Matching the platform to the question.

    Related topics

    • Part 10 overview: Emulation and Prototyping

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    See also

    • Why Cycles Matter
    • Simulation Speed and Its Limits
    • Emulation