Use this when you own Jitter Budgeting during an AMS war room.
Capture failing mode and environmental condition.
Pull synchronized waveform, logs, and report artifacts.
Mark first boundary where legal behavior diverges.
Audit reset/clock/power sequence assumptions.
Check physical coupling contributors (floorplan/power/package) where relevant.
Assign single-thread ownership for the first fix.
Propose bounded change and define success criterion.
Run scenario and safety regressions.
Document findings in closure memo.
Update signoff dashboard and waiver state.
jitter budget spreadsheet, phase-noise summary, STA uncertainty map
handoff contract
firmware/config tag
physical signoff snapshot
decision memo
AMS DECISION MEMO — Jitter Budgeting
mode/condition:
metric:
hypothesis:
fix:
regression:
owners: timing lead, PLL owner, clock tree ownerTOTAL JITTER BUDGET
source jitter
+ PLL intrinsic jitter
+ supply/package induced jitter
+ distribution skew/uncertainty
= endpoint timing margin consumptionClock quality evidence must include jitter and sequencing, not lock status alone.
CLOCKING FLOW
reference -> PLL/DLL -> distribution -> endpoint marginJITTER TREND
jitter ps
^
| o baseline
| o stress mode
| o failure edgejitter budget
lock/unlock counters
phase-noise snapshot
STA uncertainty deltas
False-lock condition released reset early; endpoint logic sampled unstable clock edge patterns.
Lock qualification policy
Reset sequencing check
Package/supply contributors
Ask: what boundary condition proves this topic is actually closed?
State boundary, mode, and evidence tag with every claim.
Always align analog, digital, and physical owners before signoff decisions.
Fixing averages while tails still fail.
Skipping package/supply evidence in jitter or SerDes issues.
Shipping with waivers that lack owner and expiration criteria.
System timing margin is consumed by source jitter, transfer jitter, supply noise, and distribution skew; the budget must close from reference clock to endpoint sampler.
Metric: total jitter budget, deterministic/random split, downstream timing margin
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