Computer Architecture · All levels

Performance Analysis Tricky Q&A

20+ senior Performance Analysis interview questions.

Q&A bank

Answer with mechanism, pitfall, validation check, and product judgment. At 10+ years, a correct definition is not enough.

Senior answer rubric

  1. Start with the failing metric and analysis context.

  2. Explain the microarchitectural or system mechanism.

  3. Name the cheapest evidence-gathering experiment.

  4. Choose a bounded fix and state what it can regress.

  5. Close with product tradeoff, validation, or escalation criteria.

What makes a performance counter trustworthy for architecture decisions?

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Q: What makes a performance counter trustworthy for architecture decisions?

A:
Stable semantics, validated collection path, and repeatable correlation with independent traces.

FOLLOW-UP TRAP: Using counters without validating overflow, aliasing, or collection window bias.

How do you separate primary from secondary bottlenecks?

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Q: How do you separate primary from secondary bottlenecks?

A:
Use constrained-resource evidence and falsification experiments to isolate the limiter with highest global impact.

FOLLOW-UP TRAP: Optimizing whichever block reports the largest local utilization.

When does roofline analysis mislead teams?

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Q: When does roofline analysis mislead teams?

A:
When it uses peak theoretical bandwidth or unrealistic operational intensity instead of measured production behavior.

FOLLOW-UP TRAP: Treating a slide-level roofline as signoff proof.

Why can IPC be an unsafe headline metric?

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Q: Why can IPC be an unsafe headline metric?

A:
It hides stall composition and workload mix; equal IPC can mask very different resource stress patterns.

FOLLOW-UP TRAP: Declaring architecture success from IPC alone.

What is your first action after seeing a sudden throughput drop?

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Q: What is your first action after seeing a sudden throughput drop?

A:
Freeze workload revision and runtime envelope, then compare counter and trace deltas against the last known-good run.

FOLLOW-UP TRAP: Changing multiple knobs before baseline alignment.

How do queue metrics help bottleneck analysis?

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Q: How do queue metrics help bottleneck analysis?

A:
Queue depth, service rate, and backpressure timing reveal where throughput is truly capped.

FOLLOW-UP TRAP: Using queue occupancy without service-rate context.

When should you reject a proposed compute-width increase?

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Q: When should you reject a proposed compute-width increase?

A:
Reject when workload placement is bandwidth- or synchronization-bound and extra width raises area/power without KPI gain.

FOLLOW-UP TRAP: Approving width increases because peak TOPS improves.

How do you keep tuning decisions senior-level?

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Q: How do you keep tuning decisions senior-level?

A:
Document expected gain, regression surface, rollout guardrails, and rollback triggers before enabling changes.

FOLLOW-UP TRAP: Shipping a lab-only tuning tweak with no production guardrails.

What indicates counter instrumentation debt?

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Q: What indicates counter instrumentation debt?

A:
Frequent root-cause debates caused by ambiguous events and missing phase-aware telemetry.

FOLLOW-UP TRAP: Assuming more counters automatically means better observability.

How do you evaluate workload representativeness?

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Q: How do you evaluate workload representativeness?

A:
Check traffic shape, phase behavior, concurrency mix, and data locality against field deployment profiles.

FOLLOW-UP TRAP: Tuning only on a single popular benchmark.

Why is p99 latency essential in architecture tuning?

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Q: Why is p99 latency essential in architecture tuning?

A:
Tail behavior exposes queueing and interference risks hidden by average throughput metrics.

FOLLOW-UP TRAP: Optimizing means while ignoring tail SLA failures.

What is a strong bottleneck review memo?

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Q: What is a strong bottleneck review memo?

A:
It states dominant limiter, competing hypothesis, falsification evidence, chosen fix, and regression checks.

FOLLOW-UP TRAP: A report dump without a decision and owner.

How do memory hierarchy effects show up in roofline placement?

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Q: How do memory hierarchy effects show up in roofline placement?

A:
Kernels shift between bandwidth ceilings as locality changes across cache, SRAM, and DRAM levels.

FOLLOW-UP TRAP: Using one flat bandwidth number for all kernels.

When do you escalate a performance issue cross-functionally?

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Q: When do you escalate a performance issue cross-functionally?

A:
Escalate when fixes cross architecture, compiler, firmware, or PD ownership boundaries and local optimizations stall.

FOLLOW-UP TRAP: Escalating before isolating a concrete mechanism.

How do you guard against tuning overfit?

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Q: How do you guard against tuning overfit?

A:
Use holdout workloads, long-duration runs, and multi-KPI acceptance gates before rollout.

FOLLOW-UP TRAP: Accepting gains from short benchmark loops only.

Why track joules per operation with throughput?

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Q: Why track joules per operation with throughput?

A:
Efficiency trends reveal unsustainable wins that may violate thermal and battery or TCO targets.

FOLLOW-UP TRAP: Treating power as a separate later-stage concern.

What is the value of counter-to-trace correlation?

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Q: What is the value of counter-to-trace correlation?

A:
It validates that aggregate telemetry reflects real timeline behavior rather than measurement artifacts.

FOLLOW-UP TRAP: Trusting counters that cannot be explained on traces.

How do you choose the next optimization after a successful fix?

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Q: How do you choose the next optimization after a successful fix?

A:
Recompute bottleneck ranking because removing one limiter often exposes the next dominant constraint.

FOLLOW-UP TRAP: Repeating the same fix pattern without re-ranking constraints.

What does a release-ready workload tuning checklist include?

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Q: What does a release-ready workload tuning checklist include?

A:
Baseline, representative mix, KPI deltas, regression budget, owner approvals, and rollback plan.

FOLLOW-UP TRAP: Only benchmark score improvements.

How should senior candidates answer performance debug questions?

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Q: How should senior candidates answer performance debug questions?

A:
Frame answers as METRIC -> MECHANISM -> EXPERIMENT -> FIX -> REGRESSION -> RELEASE JUDGMENT.

FOLLOW-UP TRAP: Listing tools and commands without decision logic.

Q&A drill guide

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MECHANISM  METRIC  EXPERIMENT  TRADEOFF  VALIDATION

Sketch while answering

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TOP-DOWN PERFORMANCE METHOD

Total cycles
 ├─ Retiring useful work
 ├─ Frontend bound
 ├─ Bad speculation
 ├─ Backend core bound
 └─ Backend memory bound

Only after classification should you propose cache, branch, pipeline, or NoC changes.

Key takeaways

  • Connect every architecture claim to a workload and measurable metric.

  • State verification and PPA impact before proposing design changes.

Common pitfalls

  • Feature-driven design without MPKI/IPC/bandwidth evidence.

  • Ignoring coherency and NoC traffic in cache and accelerator sizing.