Architecture Metrics Reference

Core metrics

• IPC / CPI — instructions per cycle and its inverse; always pair with a named workload.

• MPKI — misses per kilo-instruction; compare per cache level, not only LLC.

• AMAT — average memory access time; combines hit time, miss rate, and miss penalty.

• Bandwidth — bytes/s or beats/s; distinguish sustained vs peak and coherent vs DMA traffic.

• Latency — average is insufficient; report p50/p90/p99 for interactive and SoC services.

• Stall breakdown — frontend, branch, backend, memory, fabric, retire.

METRIC RELATIONSHIPS

CPI = 1 / IPC
AMAT = hit_time + miss_rate × miss_penalty
Effective bandwidth = min(request rate, link capacity, DRAM capacity)
Tail latency often dominates user experience even when average looks fine

How to use metrics in reviews

1. Start with one primary metric tied to product pain.

2. Decompose into stall or traffic components.

3. Map each component to a structure or policy.

4. Run one experiment per hypothesis.

5. Re-check PPA and software regressions.

Architecture deep dive

Computer architecture decisions must be tied to workload metrics and silicon constraints.

Concept diagram

ARCHITECTURE DECISION LOOP

workload → metric → bottleneck mechanism → experiment → design option → validation

Metric graph

METRIC TREND

bad run  ██████████
base     ██████████████
target   ████████████████████

Metrics and artifacts

• IPC/CPI

• latency

• bandwidth

• power

• area

• verification risk

Mini case study

A senior architecture review converts a vague performance issue into a metric, a mechanism, an experiment, and a bounded design choice.

Debug branches

• If the metric is not workload-specific, do not accept the conclusion.

• If the fix has no PPA and verification statement, the review is incomplete.

Senior review question

Ask: what single metric would prove this concept is working or failing on your workload?

Key takeaways

• Connect every architecture claim to a workload and measurable metric.

• State verification and PPA impact before proposing design changes.

Common pitfalls

• Feature-driven design without MPKI/IPC/bandwidth evidence.

• Ignoring coherency and NoC traffic in cache and accelerator sizing.