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Course contents

  • How to Use This Course
  • Reading Path
  • CDC/RDC Glossary
  • CDC/RDC Metrics Reference
  • CDC/RDC Interview Prep
  • CDC/RDC Signoff Cheatsheet
  • Clock Domains and Failure Modes8
    • Crossings and Failure Modes
    • Identifying Domains
      • Clocks and Resets in a Design
      • Generated, Gated and Muxed Clocks
      • Quasi-Static Signals
      • Writing Clock Intent
  • Metastability and Synchronizers16
  • CDC Protocols and Handshakes16
  • Reconvergence and Gray Coding16
  • Reset Domain Crossing16
  • Architecture and Design Rules16
  • CDC Signoff Methodology24
  • RDC Signoff16
  • Debug and Case Studies11
  • CDC and RDC Interview Prep30
  • Capstone: Sign Off a Multi-clock Peripheral4
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‹Clock Domains and Failure Modes
  1. Topics
  2. CDC & RDC
  3. Clock Domains and Failure Modes
  4. Identifying Domains

Part 1 · Clock Domains and Failure Modes · All levels

Identifying Domains

Finding every clock and reset in a design, and writing the clock intent down.

  • 4topics
  • 4lessons

A crossing list is only as complete as the clock list behind it. This topic turns "what clocks do we have?" from hallway knowledge into a written inventory: sources, generated clocks, gated and muxed clocks, the resets that go with them, and the intent document that signoff checks against.

Lesson

After it you can...

Clocks and Resets in a Design

List every clock and reset source and say which domain each flop belongs to.

Generated, Gated and Muxed Clocks

Decide when a divided, gated or muxed clock is a new domain.

Quasi-Static Signals

Explain why "static" must be enforced, not assumed.

Writing Clock Intent

Write the tool-neutral clock-intent table a CDC setup needs.

Read them in order: inventory first, then the tricky generated clocks, then the signals that pretend to need no clock, then the document that records it all.

Check yourself Why does this topic come before any discussion of synchronisers?

Because a synchroniser answers a known crossing, and the crossing list comes from the clock list. An unknown clock means unknown crossings, which no synchroniser choice can fix.

Related topics

  • Previous: Crossings and Failure Modes

PreviousNext: Clocks and Resets in a Design

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Up nextClocks and Resets in a Design

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See also

  • Crossings and Failure Modes