Two-Flop Synchronizers in Practice: Interview Drills

Interview drills

Interview Drills for Two-Flop Synchronizers in Practice focuses on single-bit CDC clean rate, pulse capture reliability, latency cycles. The goal is to convert issue observations into mechanism-backed closure decisions.

PROMPT
You see single-bit CDC clean rate, pulse capture reliability, latency cycles in Two-Flop Synchronizers in Practice. Explain root cause and signoff decision.

STRONG ANSWER
1. Names crossing/reset class and context.
2. Explains A two-flop chain lowers metastability propagation risk for level signals, but only when source assumptions, pulse width, and destination sampling are respected.
3. Requests CDC structural report, RTL synchronizer pattern list, assertion checks.
4. Chooses fix/waiver/escalation with regression plan.

WEAK ANSWER
Lists tool commands or generic advice without mechanism and risk framing.

Diagram to draw on whiteboard

Two-flop chain limits

SRC -----> [FF1] -----> [FF2] -----> DEST logic
            async sample    filtered sample

Valid for stable level signals.
Not sufficient for narrow pulses or multi-bit buses.

Debug tree to narrate

ROOT-CAUSE TREE — Two-Flop Synchronizers in Practice

crossing failure observed
        |
   reproducible?
     /        \
   no          yes
   |            |
stress mode   classify issue
expansion       /      |      \
            synchronizer protocol reset/reconvergence
                 |         |           |
            MTBF fit    liveness    release ordering

CDC/RDC deep dive

Metastability is managed risk, not eliminated risk.

Concept diagram

METASTABILITY FLOW

async event -> first sample may metastabilize
 -> settle window
 -> downstream sample confidence

Metric graph

MTBF TREND

target MTBF ---------
current design   ____/

Reports and artifacts

• MTBF assumptions

• synchronizer inventory

• crossing class summary

• critical waivers

Mini case study

Pulse sync chosen for a level signal caused intermittent stuck state under voltage stress.

Debug branches

• Validate crossing class first

• Check pulse width assumptions

• Audit synchronizer template usage

Senior review question

Ask: what evidence proves this risk is closed for silicon, not just tool-clean?

Key takeaways

• State crossing class, assumptions, and owner with every issue.

• Run structural and dynamic regressions after each fix.

Common pitfalls

• Treating all warnings as equivalent risk.

• Waiving issues without containment evidence.

• Skipping reset and reconvergence stress after CDC fixes.

Principal CDC/RDC review addendum

A two-flop chain lowers metastability propagation risk for level signals, but only when source assumptions, pulse width, and destination sampling are respected.

Metric: single-bit CDC clean rate, pulse capture reliability, latency cycles