CDC / RDC · All levels
Reconvergence Analysis: Worked Example
Worked Example for Reconvergence Analysis.
Worked example
Worked Example for Reconvergence Analysis focuses on reconvergence hazard count, false alarm ratio, silicon-escape risk index. The goal is to convert issue observations into mechanism-backed closure decisions.
A milestone review shows reconvergence hazard count, false alarm ratio, silicon-escape risk index. Teams disagree on severity. The right move is to isolate one representative issue, prove mechanism class, and decide fix or waiver with explicit residual risk.
Crossing under inspection
CROSSING FLOW — Reconvergence Analysis
source clock domain -> launch signal -> crossing structure -> destination sample
| | | |
source FF protocol sync / fifo destination FF
Key metric: reconvergence hazard count, false alarm ratio, silicon-escape risk indexReconvergence skew
signal A --sync path 1-- logic merge -> hazard
signal B --sync path 2--/
Individually synchronized signals can still combine illegally.Capture warning, waveform, and owning module context.
Tag mode/reset/traffic state for the failure.
Validate assumptions against spec and assertions.
Compare outcome with reconvergence report, fanout cone map, functional hazard classification.
Choose one reversible action and define regression upfront.
Did the action work?
BEFORE / AFTER — Reconvergence Analysis
open critical issues
^
| o baseline
| o after fix batch
| o after protocol proof
| o signoff-ready
+---------------------------------> closure iteration
Track issue burn-down with evidence quality, not only count.CDC/RDC deep dive
Reconvergence failures are timing + logic coupling hazards.
Concept diagram
RECONVERGENCE
branch A sync -- -> merge logic -> illegal combination window
branch B sync --/Metric graph
HAZARD REPRODUCTION RATE
before fix: 1/2000 runs
after fix: 0/100000 runsReports and artifacts
reconvergence warnings
gray transition checks
hazard replay traces
multi-bit strategy map
Mini case study
Gray pointer was legal, but downstream merge decoded mixed-era values during burst stress.
Debug branches
Trace fanin cones
align event windows
verify decode assumptions
Senior review question
Ask: what evidence proves this risk is closed for silicon, not just tool-clean?
Key takeaways
State crossing class, assumptions, and owner with every issue.
Run structural and dynamic regressions after each fix.
Common pitfalls
Treating all warnings as equivalent risk.
Waiving issues without containment evidence.
Skipping reset and reconvergence stress after CDC fixes.
Principal CDC/RDC review addendum
Signals synchronized along different paths may reconverge with phase skew, creating functionally illegal combinations despite structurally legal crossings.
Metric: reconvergence hazard count, false alarm ratio, silicon-escape risk index