Reset Sequencing: Interview Drills

Interview drills

Interview Drills for Reset Sequencing focuses on domain bring-up order violations, dependency deadlocks, reset latency. The goal is to convert issue observations into mechanism-backed closure decisions.

PROMPT
You see domain bring-up order violations, dependency deadlocks, reset latency in Reset Sequencing. Explain root cause and signoff decision.

STRONG ANSWER
1. Names crossing/reset class and context.
2. Explains Reset ordering enforces dependency contracts so control domains and memories become valid before downstream consumers execute.
3. Requests bring-up sequence spec, dependency matrix, firmware reset script.
4. Chooses fix/waiver/escalation with regression plan.

WEAK ANSWER
Lists tool commands or generic advice without mechanism and risk framing.

Diagram to draw on whiteboard

Reset dependency graph

always-on reset release
      -> clocks stable
      -> fabric/control release
      -> data-path release
      -> peripheral release

Violation causes boot races and phantom deadlocks.

Debug tree to narrate

ROOT-CAUSE TREE — Reset Sequencing

crossing failure observed
        |
   reproducible?
     /        \
   no          yes
   |            |
stress mode   classify issue
expansion       /      |      \
            synchronizer protocol reset/reconvergence
                 |         |           |
            MTBF fit    liveness    release ordering

CDC/RDC deep dive

Reset release ordering is a first-order reliability contract.

Concept diagram

RESET RELEASE FLOW

assert global -> clocks stable -> sync release per domain -> first transaction

Metric graph

BOOT STABILITY

passes per 1k boots: 920 -> 980 -> 999

Reports and artifacts

• reset dependency matrix

• RDC warning classes

• boot stress logs

• waiver aging

Mini case study

Domain B released before producer A was valid, causing rare startup deadlock.

Debug branches

• Correlate reset and clock timelines

• verify async assert/sync release

• exercise skewed release tests

Senior review question

Ask: what evidence proves this risk is closed for silicon, not just tool-clean?

Key takeaways

• State crossing class, assumptions, and owner with every issue.

• Run structural and dynamic regressions after each fix.

Common pitfalls

• Treating all warnings as equivalent risk.

• Waiving issues without containment evidence.

• Skipping reset and reconvergence stress after CDC fixes.

Principal CDC/RDC review addendum

Reset ordering enforces dependency contracts so control domains and memories become valid before downstream consumers execute.

Metric: domain bring-up order violations, dependency deadlocks, reset latency