VLSI DV Interview Puzzles · All levels

Inline Implication Can Empty Intersection

For the shown randomize() call, does randomization always pass, always fail, or depend on solver luck? Explain pre/post hook behavior too.

Puzzle

Difficulty: Hard · Puzzle 1 of 6 · Topic: randomize() with Puzzles

For the shown randomize() call, does randomization always pass, always fail, or depend on solver luck? Explain pre/post hook behavior too.

Code

systemverilog
class txn;
  rand bit       is_write;
  rand bit [7:0] addr;
  rand bit [3:0] len;
  bit            lock_len;

  constraint c_base {
    addr inside {[0:255]};
    is_write -> (len inside {[1:8]});
    !is_write -> (len inside {[4:12]});
  }

  function void pre_randomize();
    if (lock_len) len = 4;
  endfunction

  function void post_randomize();
    if (is_write && (len > 8)) $error("illegal write len");
  endfunction
endclass

txn t = new();
t.lock_len = 1;
assert(t.randomize() with {
  is_write == 1;
  (addr inside {[16:31]}) -> (len inside {[9:12]});
});

Hint

Inline with-clause is conjoined with class constraints, not overriding them.

Step-by-step solution

diagram
1) With is_write==1, class constraint requires len in 1..8.
2) Inline implication can additionally require len in 9..12 when addr is 16..31.
3) If solver picks addr in 16..31, constraints become unsatisfiable (len must be both 1..8 and 9..12).
4) Solver can still satisfy by choosing addr outside 16..31, so call is satisfiable overall (not always fail).
5) pre_randomize runs before solve but does not bypass constraints; post_randomize runs only on successful solve.

Answer

Answer: The call can succeed but not with addr in 16..31; successful outcomes force addr outside that range, and post_randomize executes only on those successful solves.

Why candidates get it wrong

Many candidates think inline constraints 'override' base constraints procedurally; they are logically ANDed.

Interviewer follow-up

How would you rewrite inline constraints to force success while keeping is_write==1?

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