VLSI DV Interview Puzzles · All levels

rand_mode(0) Freezes Value and Can Overconstrain

Will randomize succeed? Explain the exact reason.

Puzzle

Difficulty: Medium · Puzzle 5 of 6 · Topic: randomize() with Puzzles

Will randomize succeed? Explain the exact reason.

Code

systemverilog

class rw_req;
  rand bit is_wr;
  rand bit [3:0] len;
  constraint c {
    if (is_wr) len inside {[1:4]};
    else       len inside {[8:12]};
  }
endclass

rw_req r = new();
r.len = 10;
r.len.rand_mode(0);
assert(r.randomize() with { is_wr == 1; });

Hint

len is no longer randomized but still participates in active constraints.

Step-by-step solution

diagram

1) rand_mode(0) on len freezes len at current value 10.
2) Inline sets is_wr=1, activating len inside 1..4.
3) Frozen len=10 violates active constraint.
4) No legal assignment exists, so randomize fails.

Answer

Answer: It fails 100%: len is fixed to 10 and cannot satisfy the is_wr==1 branch constraint len in [1:4].

Why candidates get it wrong

A frequent misconception is that rand_mode(0) also disables constraints that reference that variable.

Interviewer follow-up

How can you preserve len=10 and still make randomize pass?

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