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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
    • Testbench Debug Puzzles: Why Did the Test Hang?
    • Deadlock Scenario Puzzles: Objection and Phase Stalls
      • Early Return Leaves Objection Raised
      • fork...join_none Thread Leak
      • Semaphore Token Leak on Error Path
      • Mailbox Consumer Blocks Forever
      • Lock Inversion with Two Semaphores
      • Child Sequence Raises Objection but Never Drops
    • Scoreboard Puzzles: Mismatch or Ordering Bug?
    • Real Interview Rounds: End-to-End Debug Walkthrough
    • Scenario & Debug Puzzles: Tricky Q&A
  • Interview Prep: Puzzle Rounds5
  • DV Puzzle Cheatsheet
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‹Deadlock Scenario Puzzles: Objection and Phase Stalls
  1. Topics
  2. DV Interview Puzzles
  3. Scenario & Debug Puzzles
  4. Deadlock Scenario Puzzles: Objection and Phase Stalls
  5. Early Return Leaves Objection Raised

VLSI DV Interview Puzzles · All levels

Early Return Leaves Objection Raised

run_phase never ends. \`+UVM_OBJECTION_TRACE\` shows one sequence objection remains high. Pinpoint where objection symmetry is broken.

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    Puzzle

    Difficulty: Medium · Puzzle 1 of 6 · Topic: Deadlock Scenario Puzzles: Objection and Phase Stalls

    run_phase never ends. \`+UVM_OBJECTION_TRACE\` shows one sequence objection remains high. Pinpoint where objection symmetry is broken.

    Code

    design.sv
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    class traffic_seq extends uvm_sequence #(my_item);
      \`uvm_object_utils(traffic_seq)
      bit enable_traffic;
      virtual task body();
        if (starting_phase != null)
          starting_phase.raise_objection(this);
        if (!enable_traffic)
          return; // bug: drop is skipped
        repeat (50) \`uvm_do(req)
        if (starting_phase != null)
          starting_phase.drop_objection(this);
      endtask
    endclass

    Hint

    Any return/disable path after raise must still execute drop.

    Step-by-step solution

    Diagram
    1) Enable objection trace and identify owner component/object that never drops.
    2) Trace sequence control flow for config paths where enable_traffic is 0.
    3) Confirm return bypasses drop_objection.
    4) Wrap raise/drop with a raised flag and guaranteed cleanup block.
    5) Add lint/checklist item: no naked return after raise_objection.

    Answer

    Answer: Bug: raise_objection executes but return bypasses drop_objection. Fix: structurally guarantee drop in all exits (raised flag + final cleanup).

    Why candidates get it wrong

    Checking only default config misses deadlock path gated by runtime knobs.

    Interviewer follow-up

    Would you enforce objection symmetry with a reusable utility wrapper around sequence body?

    Related topics

    • Back to Deadlock Scenario Puzzles: Objection and Phase Stalls

    • Scenario & Debug Puzzles section

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    See also

    • Semaphore Token Leak on Error Path
    • Mailbox Consumer Blocks Forever
    • Lock Inversion with Two Semaphores