SIGNAL -> LAYER -> CONTRACT -> METRIC -> DEBUG
AMBA: AR/AW/W/R/B, IDs, bursts, response, ordering
ACE/CHI: snoop, home node, shareability, line state, retry
DDR: controller/PHY, training, refresh, bank conflicts, ECC
PCIe/CXL: TLP, DLLP, LTSSM, credits, enumeration, attach mode
Peripheral: reset state, register map, interrupt, DMA, driver contract
Verification: VIP monitor, scoreboard, assertion, coverage, complianceWhich transaction failed first?
Which layer owns forward progress?
Is the observed behavior illegal or merely unexpected?
Which metric proves product impact?
Which artifact proves root cause?
Which regression protects compatibility?