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Course contents

  • How to Use This Course
  • Protocol Metrics Reference
  • Protocols Glossary
  • Reading Path
  • Protocol Fundamentals61
  • AMBA Family (APB / AHB / AXI)61
  • Coherence Fabrics (ACE / CHI)61
  • Memory Interfaces (DDR / LPDDR / HBM)61
  • PCIe & CXL61
  • Embedded Peripherals (I2C / SPI / UART)61
  • High-Speed I/O (USB / Ethernet / MIPI)61
  • Protocol Verification & Compliance61
  • Protocols Interview Prep5
    • Protocols Whiteboard Framework
    • Scenario: AXI Ordering Trap
    • Scenario: DDR Bandwidth Collapse
    • Scenario: PCIe Link Degrade
    • Protocols Interview Q&A Bank
  • Interface Protocols Cheatsheet
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‹Bus Protocols
  1. Topics
  2. Bus Protocols
  3. Protocols Interview Prep

Interface Protocols · All levels

Protocols Interview Prep

Whiteboard frameworks and protocol debug scenarios.

  • 5topics
  • 5lessons

Topics in this section

  1. 1Protocols Whiteboard Framework1 lesson
  2. 2Scenario: AXI Ordering Trap1 lesson
  3. 3Scenario: DDR Bandwidth Collapse1 lesson
  4. 4Scenario: PCIe Link Degrade1 lesson
  5. 5Protocols Interview Q&A Bank1 lesson
On this page

    Whiteboard answer shape

    Diagram
    1. Name the protocol layer.
    2. Name the transaction identity.
    3. State the ordering or flow-control rule.
    4. Ask for waveform + transaction log + spec clause.
    5. Propose the smallest experiment.
    6. State the regression suite.

    Scenarios

    1. scenario-axi-ordering-trap/ — Scenario: AXI Ordering Trap

    2. scenario-ddr-bandwidth-collapse/ — Scenario: DDR Bandwidth Collapse

    3. scenario-pcie-link-degrade/ — Scenario: PCIe Link Degrade

    Protocol deep dive

    Protocol correctness is a layered contract enforced at every boundary.

    Concept diagram

    Diagram
    intent -> transaction -> channel -> physical

    Metric graph

    Diagram
    baseline -> experiment -> target

    Metrics and artifacts to collect

    • latency

    • throughput

    • error rate

    • compliance status

    Mini case study

    Always anchor debug to the first bad transaction.

    Debug branches

    • Name layer

    • Name ID

    • Name artifact

    Senior review question

    Ask: what is the first transaction that deviates, and which spec rule does it test?

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    See also

    • How to Use This Course
    • Protocol Metrics Reference
    • Protocols Glossary