Coherence Fabrics (ACE / CHI)

Section goal

Coherent transactions, snoop channels, shareability domains, cache maintenance, CHI topology, and fabric-level ordering.

How to study this section

1. Start with the topic hub to learn the contract.

2. Use mechanism and reports pages to connect rules to metrics.

3. Use debug and worked-example pages for interview and on-call practice.

4. Close with checklist and PPA impact before signing any change.

Topics

1. ace-coherent-transactions/ — ACE Coherent Transactions

2. snoop-and-cache-maintenance/ — Snoop & Cache Maintenance

3. chi-topology-basics/ — CHI Topology Basics

4. coherence-fabric-debug/ — Coherence Fabric Debug

Related topics

• Protocols course hub

Protocol deep dive

Coherence extends memory transactions with snoop and state — traffic multiplies when software shares cache lines.

Concept diagram

COHERENCE TRAFFIC FLOW

RN issues coherent read
   -> HN looks up directory
   -> snoops to sharers
   -> data + state update returned

False sharing: different variables, same cache line -> coherence storm.

Metric graph

COHERENCY TRAFFIC STACK

data fetch        ████████
snoop responses   ██████████████
writebacks        ██████
maintenance ops   ████

High snoop stack with good IPC -> suspect line sharing before faster NoC.

Metrics and artifacts to collect

• snoop rate

• intervention latency

• coherency transaction mix

• false sharing indicators

Mini case study

Benchmark IPC looked fine but system power spiked: per-core counters were on one cache line. Padding counters fixed coherency traffic without any NoC change.

Debug branches

• If snoop latency high, check home node placement and directory policy.

• If ordering bug, run litmus sequences before microarch changes.

• If traffic storm, profile cache line sharing in software layout.

Senior review question

Ask: what is the first transaction that deviates, and which spec rule does it test?