Interface Protocols · All levels

CHI Topology Basics: Worked Example

Worked Example for CHI Topology Basics.

Worked example

Worked Example for CHI Topology Basics focuses on request retry rate, directory occupancy, p99 fabric latency. The goal is to connect the observable symptom to protocol mechanism, ownership, and regression risk.

A product workload shows request retry rate, directory occupancy, p99 fabric latency. The first review mistake is to blame the whole interface. A better review starts by pinning one transaction, proving where protocol progress stopped, and checking whether the observed behavior is legal for CHI Topology Basics.

Sequence under inspection

diagram
SEQUENCE — CHI Topology Basics

  initiator            interconnect/PHY            target
      |  request (id) ------->  |                     |
      |                         |  forward ----------> |
      |                         |                     | work
      |                         |  <---- response ---- |
      |  <----- complete ------ |                     |
      |
   metric captured here: request retry rate, directory occupancy, p99 fabric latency

CHI node types on a mesh

diagram
CHI MESH (RN = request node, HN = home node, SN = slave node)

   RN-F --- X --- X --- RN-I
    |       |     |       |
    X --- HN-F --- X --- X
    |       |     |       |
   SN  --- X --- HN-F --- SN

RN: cores/accelerators that issue requests
HN: home node owns coherency + directory for an address range
SN: memory/peripheral endpoints

Latency = hops x per-hop cost; placement matters.
  1. Capture the failing waveform and transaction log.

  2. Tag the request ID, address, endpoint, or lane.

  3. Find the first response, retry, stall, or missing completion.

  4. Compare against CHI node map, VC utilization report, request/response correlation log.

  5. Choose one reversible fix and write the regression list before editing RTL or firmware.

Did the fix work?

diagram
BEFORE / AFTER — CHI Topology Basics

           failing        target
metric  |    ●              ┄┄┄┄┄┄┄
        |     \
        |      \___ ● bounded fix
        |           \
        |            ● validated
        +-------------------------------> change set
Prove the mechanism moved the metric; one good dot is not proof.

Protocol deep dive

Coherence extends memory transactions with snoop and state — traffic multiplies when software shares cache lines.

Concept diagram

diagram
COHERENCE TRAFFIC FLOW

RN issues coherent read
   -> HN looks up directory
   -> snoops to sharers
   -> data + state update returned

False sharing: different variables, same cache line -> coherence storm.

Metric graph

diagram
COHERENCY TRAFFIC STACK

data fetch        ████████
snoop responses   ██████████████
writebacks        ██████
maintenance ops   ████

High snoop stack with good IPC -> suspect line sharing before faster NoC.

Metrics and artifacts to collect

  • snoop rate

  • intervention latency

  • coherency transaction mix

  • false sharing indicators

Mini case study

Benchmark IPC looked fine but system power spiked: per-core counters were on one cache line. Padding counters fixed coherency traffic without any NoC change.

Debug branches

  • If snoop latency high, check home node placement and directory policy.

  • If ordering bug, run litmus sequences before microarch changes.

  • If traffic storm, profile cache line sharing in software layout.

Senior review question

Ask: what is the first transaction that deviates, and which spec rule does it test?

Key takeaways

  • Connect every protocol claim to a transaction identity and measurable metric.

  • Store the artifact (waveform, log, counter) next to every signoff decision.

Common pitfalls

  • Debugging timeouts without finding the first bad transaction.

  • Quoting peak bus width without payload efficiency and retry overhead.

  • Treating VIP compliance as a substitute for system integration replay.

Narrative walkthrough

A team sees request retry rate, directory occupancy, p99 fabric latency drop 40% after a seemingly small change near CHI Topology Basics.

They almost widen the interface. Instead they capture id=7 read burst and find W beats never matched AW len.