Interface Protocols · All levels
CHI Topology Basics: Interview Drills
Interview Drills for CHI Topology Basics.
Interview drills
Interview Drills for CHI Topology Basics focuses on request retry rate, directory occupancy, p99 fabric latency. The goal is to connect the observable symptom to protocol mechanism, ownership, and regression risk.
PROMPT
You see request retry rate, directory occupancy, p99 fabric latency on CHI Topology Basics. Walk through root cause and fix.
STRONG ANSWER
1. Names the layer and transaction identity.
2. Explains CHI separates request, response, data, and snoop flows across nodes with directory and home-node responsibilities.
3. Requests CHI node map, VC utilization report, request/response correlation log.
4. Proposes one reduced sequence and one system regression.
WEAK ANSWER
Jumps to widening the interface, increasing FIFO depth, or blaming firmware without evidence.Diagram to draw on the whiteboard
CHI node types on a mesh
CHI MESH (RN = request node, HN = home node, SN = slave node)
RN-F --- X --- X --- RN-I
| | | |
X --- HN-F --- X --- X
| | | |
SN --- X --- HN-F --- SN
RN: cores/accelerators that issue requests
HN: home node owns coherency + directory for an address range
SN: memory/peripheral endpoints
Latency = hops x per-hop cost; placement matters.Root-cause tree to narrate
ROOT-CAUSE TREE — CHI Topology Basics
request retry rate, directory occupancy, p99 fabric latency looks wrong
|
reproducible?
/ \
no yes
| |
flaky env same first transaction every time?
/ seed / \
yes no
| |
protocol rule timing/reset/PVT
or config bug or load-dependentProtocol deep dive
Coherence extends memory transactions with snoop and state — traffic multiplies when software shares cache lines.
Concept diagram
COHERENCE TRAFFIC FLOW
RN issues coherent read
-> HN looks up directory
-> snoops to sharers
-> data + state update returned
False sharing: different variables, same cache line -> coherence storm.Metric graph
COHERENCY TRAFFIC STACK
data fetch ████████
snoop responses ██████████████
writebacks ██████
maintenance ops ████
High snoop stack with good IPC -> suspect line sharing before faster NoC.Metrics and artifacts to collect
snoop rate
intervention latency
coherency transaction mix
false sharing indicators
Mini case study
Benchmark IPC looked fine but system power spiked: per-core counters were on one cache line. Padding counters fixed coherency traffic without any NoC change.
Debug branches
If snoop latency high, check home node placement and directory policy.
If ordering bug, run litmus sequences before microarch changes.
If traffic storm, profile cache line sharing in software layout.
Senior review question
Ask: what is the first transaction that deviates, and which spec rule does it test?
Key takeaways
Connect every protocol claim to a transaction identity and measurable metric.
Store the artifact (waveform, log, counter) next to every signoff decision.
Common pitfalls
Debugging timeouts without finding the first bad transaction.
Quoting peak bus width without payload efficiency and retry overhead.
Treating VIP compliance as a substitute for system integration replay.
Interview whiteboard
Draw layers first, then place the failing transaction on the diagram.