Interface Protocols · All levels

Protocol Verification & Compliance: Tricky Q&A

Senior interview and review questions for Protocol Verification & Compliance.

Section Q&A bank

Use these drills after completing all topics in Protocol Verification & Compliance. Answer with layer, transaction, metric, artifact, and regression.

Scoreboard vs assertion — division of labor?

diagram

[INT][PROT][PROTOCOL-VERIFICATION]

Q: Scoreboard vs assertion — division of labor?

A:
Assertions check local temporal rules; scoreboards correlate end-to-end request/response pairs.

FOLLOW-UP TRAP: Assertions alone proving system correctness.

What is a compliance gap?

diagram

[INT][PROT][PROTOCOL-VERIFICATION]

Q: What is a compliance gap?

A:
Spec requirement with no mapped test, assertion, or coverage bin.

FOLLOW-UP TRAP: Closing coverage % without requirement trace.

VIP pass but chip fails — why?

diagram

[INT][PROT][PROTOCOL-VERIFICATION]

Q: VIP pass but chip fails — why?

A:
Integration assumptions: address map, reset, clock, bridge, or firmware differ from block env.

FOLLOW-UP TRAP: Closing the bug as 'VIP issue'.

Q&A drill guide

diagram

LAYER -> TRANSACTION -> METRIC -> ARTIFACT -> FIX -> REGRESSION

Sketch while answering

diagram

VERIFICATION CLOSURE LOOP

spec clause -> test -> assertion -> coverage -> waiver -> signoff
                  ^                           |
                  +--------- gap found --------+

Common traps

If VIP pass but silicon fail, check integration assumptions.
If scoreboard noisy, fix key (ID+port+addr).
If coverage plateau, add compliance gap analysis not more repeats.

Key takeaways

Connect every protocol claim to a transaction identity and measurable metric.
Store the artifact (waveform, log, counter) next to every signoff decision.

Common pitfalls

Debugging timeouts without finding the first bad transaction.
Quoting peak bus width without payload efficiency and retry overhead.
Treating VIP compliance as a substitute for system integration replay.

Practice this lesson