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Course contents

  • RTL Foundations36
    • Digital Logic for RTL Engineers
      • Algebra Before Gates
      • The Identity Toolkit
      • De Morgan Rules
      • Truth Tables as a Debug Anchor
      • K-Map Intuition
      • Implementation Trade-offs
    • Number Systems for RTL Engineers
    • Verilog Fundamentals
    • Verilog Operators and Types
    • SystemVerilog for RTL
    • Simulation and Testbenches
  • Combinational Design25
  • Sequential Design27
  • FSM & Control27
  • Timing & Clocking39
  • Reset & CDC34
  • Memory & Buses57
  • Advanced RTL28
  • Senior & Interview76
  • Glossary and Notation
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