Debug playbook

Debug Playbook for Package SI/PI Contracts focuses on SI/PI margin violations, package-driven timing regressions. The goal is to map symptoms to boundary contracts, owner actions, and regression-proof closure.

Integration debug is a search for the first contract break, not the loudest downstream failure signature.

Root-cause tree

ROOT-CAUSE TREE — Package SI/PI Contracts

SI/PI margin violations, package-driven timing regressions regressed
         |
   same baseline manifest?
      /           \
    no             yes
    |               |
version/collateral  real integration
mismatch            contract break
 /       \            |
inputs    env      isolate domain
drift     drift    and first failure

1. Freeze baseline manifest and owner matrix.

2. Find first failing boundary and earliest reproducible symptom.

3. Classify failure type: contract, collateral, implementation, or governance.

4. Prove with one reduced experiment.

5. Apply smallest owner-controlled fix.

6. Run focused verification and full cross-domain regression.

Review memo template

STAFF SOC REVIEW MEMO — Package & Interface / Package SI/PI Contracts

1. Symptom
   - Watched metric: SI/PI margin violations, package-driven timing regressions
   - Failing integration boundary: <domain/interface>
   - Baseline manifest: <hash/tag>
   - Repro setup: <sim/emulation/fpga/silicon + fw tag>

2. Mechanism hypothesis
   - Primary mechanism: Package SI/PI constraints define return paths, impedance, and noise budgets that must be reflected in chip-level assumptions.
   - Competing hypothesis: <contract drift, collateral mismatch, implementation bug, governance gap>
   - Missing evidence: <trace, report, checklist, signoff artifact>

3. Proposed action
   - Minimal reversible fix: <contract update, config patch, RTL fix, process guardrail>
   - Expected metric movement: <delta and scope>
   - Regression risk: timing, power, functionality, schedule

4. Signoff
   - Re-run artifact: SI/PI budget table, package model manifest, margin report
   - Required owners: SI/PI owner, package architect, signoff owner
   - Final decision: close, waive (bounded), or escalate

SoC deep dive

Package assumptions must be treated as first-class chip constraints.

Concept diagram

PACKAGE CO-DESIGN
die io <-> package routing <-> board constraints

Metric graph

PACKAGE RISK MIX
SI margin █████
power integrity ████
lane mapping ███

Reports and artifacts

• bump map revision log

• SI/PI margin report

• IO co-design checklist

• package bring-up failures

Mini case study

Link degradation on product board came from package routing assumptions not reflected in pre-silicon model.

Debug branches

• Compare package model versions

• Audit lane mapping

• Correlate SI/PI margins to failures

Senior review question

Ask: what baseline, owner, and artifact prove this topic is truly closed?

Key takeaways

• State baseline manifest and owner with every closure metric.

• Run cross-domain regression after every top-level fix.

Common pitfalls

• Comparing results across different manifests.

• Unowned issues slipping through review cycles.

• Waiving risks without expiry and validation plan.

Principal SoC review addendum

Package SI/PI constraints define return paths, impedance, and noise budgets that must be reflected in chip-level assumptions.

Metric: SI/PI margin violations, package-driven timing regressions