Worked example

Worked Example for Package SI/PI Contracts focuses on SI/PI margin violations, package-driven timing regressions. The goal is to map symptoms to boundary contracts, owner actions, and regression-proof closure.

A review detects SI/PI margin violations, package-driven timing regressions. Strong analysis starts by freezing baseline and proving where the first boundary failed in Package SI/PI Contracts.

Sequence under inspection

SOC INTEGRATION FLOW — Package SI/PI Contracts

requirements + budgets
        |
        v
IP handoff + collateral check
        |
        v
integration build + bring-up smoke
        |
        v
cross-domain signoff evidence
        |
        v
tapeout readiness decision

Metric in focus: SI/PI margin violations, package-driven timing regressions

SI/PI contract budget

PACKAGE SI/PI BUDGET

impedance target
return path quality
power droop budget
timing margin reservation

1. Capture failing artifact and manifest tags.

2. Map failure to one owner boundary.

3. Verify mechanism using one reduced repro.

4. Compare against SI/PI budget table, package model manifest, margin report.

5. Select one reversible fix and define full regression upfront.

Did the fix work?

BEFORE / AFTER FIX — Package SI/PI Contracts

risk index
 0 |                    --- target
40 |    ● regression
65 |         ● before fix
20 |              ● after fix
    +-------------------------------> iteration
Always verify collateral, regression suite, and owner signoff.

SoC deep dive

Package assumptions must be treated as first-class chip constraints.

Concept diagram

PACKAGE CO-DESIGN
die io <-> package routing <-> board constraints

Metric graph

PACKAGE RISK MIX
SI margin █████
power integrity ████
lane mapping ███

Reports and artifacts

• bump map revision log

• SI/PI margin report

• IO co-design checklist

• package bring-up failures

Mini case study

Link degradation on product board came from package routing assumptions not reflected in pre-silicon model.

Debug branches

• Compare package model versions

• Audit lane mapping

• Correlate SI/PI margins to failures

Senior review question

Ask: what baseline, owner, and artifact prove this topic is truly closed?

Key takeaways

• State baseline manifest and owner with every closure metric.

• Run cross-domain regression after every top-level fix.

Common pitfalls

• Comparing results across different manifests.

• Unowned issues slipping through review cycles.

• Waiving risks without expiry and validation plan.

Principal SoC review addendum

Package SI/PI constraints define return paths, impedance, and noise budgets that must be reflected in chip-level assumptions.

Metric: SI/PI margin violations, package-driven timing regressions