Foundational theory

Package SI/PI Contracts sits on a cross-team contract. Package SI/PI constraints define return paths, impedance, and noise budgets that must be reflected in chip-level assumptions. Senior integrators tie every symptom to owner, baseline manifest, and measurable closure evidence.

Core concepts explained

• Package SI/PI constraints define return paths, impedance, and noise budgets that must be reflected in chip-level assumptions.

• Primary metric: SI/PI margin violations, package-driven timing regressions

• Primary artifact: SI/PI budget table, package model manifest, margin report

• Owners: SI/PI owner, package architect, signoff owner

• Top-level closure is a cross-domain optimization problem.

• Reproducibility is part of technical correctness.

Why this matters at tapeout

At tapeout, Package SI/PI Contracts mistakes create high-cost escapes. Package constraints are first-order chip design inputs, not post-layout checks.

Mental model

PACKAGE SI/PI BUDGET

impedance target
return path quality
power droop budget
timing margin reservation

Worked intuition

1. Name failing milestone or gate.

2. Freeze manifest tags and integration baseline.

3. Review metric movement for SI/PI margin violations, package-driven timing regressions.

4. Identify first boundary where behavior diverges from contract.

5. Collect SI/PI budget table, package model manifest, margin report with owner mapping.

6. Classify: contract bug, collateral drift, implementation issue, or governance gap.

7. Propose minimal fix plus full regression scope.

Common misconceptions

• Top-level problems can be solved by one team in isolation.

• A green local block report implies global readiness.

• Waivers are harmless if schedule is tight.

• Manifest discipline is process-only, not technical.

Visual reinforcement

SI/PI contract budget

PACKAGE SI/PI BUDGET

impedance target
return path quality
power droop budget
timing margin reservation

Layer responsibilities

SOC INTEGRATION LAYERS — Package SI/PI Contracts

layer               owns                          failure mode
-----------------   ---------------------------   ------------------------
architecture        partition + contracts         impossible budgets
ip handoff          models + collateral           integration mismatch
fabric/clock/reset  global behavior               domain deadlock
physical/package    route + SI/PI + IO            late closure churn
signoff process     manifests + waivers           non-reproducible claims
program governance  owners + escalations          schedule collapse

SoC deep dive

Package assumptions must be treated as first-class chip constraints.

Concept diagram

PACKAGE CO-DESIGN
die io <-> package routing <-> board constraints

Metric graph

PACKAGE RISK MIX
SI margin █████
power integrity ████
lane mapping ███

Reports and artifacts

• bump map revision log

• SI/PI margin report

• IO co-design checklist

• package bring-up failures

Mini case study

Link degradation on product board came from package routing assumptions not reflected in pre-silicon model.

Debug branches

• Compare package model versions

• Audit lane mapping

• Correlate SI/PI margins to failures

Senior review question

Ask: what baseline, owner, and artifact prove this topic is truly closed?

Key takeaways

• State baseline manifest and owner with every closure metric.

• Run cross-domain regression after every top-level fix.

Common pitfalls

• Comparing results across different manifests.

• Unowned issues slipping through review cycles.

• Waiving risks without expiry and validation plan.

Theory reinforcement

Package constraints are first-order chip design inputs, not post-layout checks.