Step-by-step analysis walkthrough

Use when you own Package SI/PI Contracts in a top-level integration review.

1. Open latest integration baseline and manifest.

2. Inspect failing metric by domain.

3. Trace first failing contract boundary.

4. Collect artifacts and assign single-thread owner.

5. Define minimal proof experiment.

6. Apply smallest reversible fix.

7. Run focused check then full regression.

8. Update dashboard and governance log.

9. Decide: close, waive with expiry, or escalate.

10. Publish final review memo.

Artifacts to collect

• SI/PI budget table, package model manifest, margin report

• baseline manifest

• owner matrix

• regression summary

• risk memo

Decision memo template

SOC DECISION MEMO — Package SI/PI Contracts
baseline:
metric:
root cause:
fix:
residual risk:
owners: SI/PI owner, package architect, signoff owner

Reference visuals

SI/PI contract budget

PACKAGE SI/PI BUDGET

impedance target
return path quality
power droop budget
timing margin reservation

SoC deep dive

Package assumptions must be treated as first-class chip constraints.

Concept diagram

PACKAGE CO-DESIGN
die io <-> package routing <-> board constraints

Metric graph

PACKAGE RISK MIX
SI margin █████
power integrity ████
lane mapping ███

Reports and artifacts

• bump map revision log

• SI/PI margin report

• IO co-design checklist

• package bring-up failures

Mini case study

Link degradation on product board came from package routing assumptions not reflected in pre-silicon model.

Debug branches

• Compare package model versions

• Audit lane mapping

• Correlate SI/PI margins to failures

Senior review question

Ask: what baseline, owner, and artifact prove this topic is truly closed?

Key takeaways

• State baseline manifest and owner with every closure metric.

• Run cross-domain regression after every top-level fix.

Common pitfalls

• Comparing results across different manifests.

• Unowned issues slipping through review cycles.

• Waiving risks without expiry and validation plan.

Principal SoC review addendum

Package SI/PI constraints define return paths, impedance, and noise budgets that must be reflected in chip-level assumptions.

Metric: SI/PI margin violations, package-driven timing regressions