Useful Skew Tradeoffs: Silicon PPA Impact

Silicon PPA and closure impact

Sizing, VT, skew, and route each have PPA side effects.

Area drivers

• Upsize cells

• Buffer insertion

• Shield wires

Power drivers

• VT swap leakage

• Clock tree power for skew

Timing impact

• Net delay on critical routes

• SI delta delay

PD consequences

• Congestion limits sizing

• Layer promotion for nets

Verification burden

• ECO equivalence

• SI re-signoff

PPA — Useful Skew Tradeoffs
area/power/timing/closure-time tradeoff

PPA takeaways

• ECO has PPA cost

• Signoff is multi-corner

Design option PPA snapshot

BEFORE / AFTER ECO — Useful Skew Tradeoffs

WNS (ps)
  0 |                    --- target
-50 |    ● regressed
-80 |         ● before ECO
-20 |              ● after ECO
    +-------------------------------> ECO iteration
Prove setup AND hold moved safely.

STA deep dive

ECO without regression is a coin flip.

Concept diagram

ECO LOOP

failing path -> fix -> setup check -> hold check -> SI -> MMMC matrix

Metric graph

ECO PROGRESS

WNS
 0 |              o target
-50|        o
-100|   o baseline
    +-----------------> ECO #

Reports and artifacts

• pre/post WNS

• hold delta

• leakage delta

• ECO ticket log

Mini case study

48-hour tapeout crunch: VT swap fixed setup; hold fixed with route on short path — order mattered.

Debug branches

• Never ship setup-only proof

• Logical ECO needs equivalence

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

• State corner, mode, view, and database tag with every slack claim.

• Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

• Comparing STA runs with different SPEF or SDC tags.

• Broad false_path to green-wash violations.

• Setup-only ECO without hold check.

Principal STA review addendum

Intentional clock skew can borrow setup time but increases hold risk and clock tree complexity; useful skew is a negotiated margin.

Metric: skew budget used, hold impact, clock tree power