STA Mastery · All levels
SI Timing & Noise: Tricky Q&A
Senior interview and review questions for SI Timing & Noise.
Section Q&A bank
Use these drills after completing all topics in SI Timing & Noise. Answer with corner/mode/view, path group, metric, artifact, ECO, and regression.
What is delta delay?
diagram
[INT][STA][SI-TIMING]
Q: What is delta delay?
A:
Extra delay on victim net due to switching aggressors — SI effect on timing.
FOLLOW-UP TRAP: Ignoring SI after timing ECO.Noise vs delta delay?
diagram
[INT][STA][SI-TIMING]
Q: Noise vs delta delay?
A:
Delta delay changes timing; noise glitch risks functional wrong data on inputs.
FOLLOW-UP TRAP: Fixing only setup without noise check.Q&A drill guide
diagram
CONSTRAINT -> VIEW -> PATH -> METRIC -> ECO -> REGRESSIONSketch while answering
diagram
SI ON VICTIM
victim net delay = base_RC + coupling_from_aggressorsKey takeaways
State corner, mode, view, and database tag with every slack claim.
Run setup and hold plus MMMC regression after every ECO.
Common pitfalls
Comparing STA runs with different SPEF or SDC tags.
Broad false_path to green-wash violations.
Setup-only ECO without hold check.