View Mismatch Triage: Software / Programmer View

RTL / implementation view

RTL owners need constraint literacy to avoid ghost violations.

What designers feel

• Surprise timing after RTL 'small' change

• Clock domain bugs

RTL structure impact

• Pipeline depth

• Reset and clock gating

• Boundary flop placement

Synthesis interaction

• Retiming constraints

• Don't care optimization vs STA

RTL-side mitigations

• Register boundaries

• Clean clocking

• Review SDC with RTL changes

RTL — View Mismatch Triage
// pipeline stage added -> check new reg2reg path group WNS

Layer the driver touches

STA OWNERSHIP LAYERS — View Mismatch Triage

layer              owns                         failure mode
----------------   --------------------------   ---------------------
constraints        clocks, IO, exceptions       false violations
implementation     cells, nets, placement       real path delay
extraction         SPEF/RC corners              view mismatch
signoff policy     derate, MMMC matrix          margin disputes
closure           ECO order, regression        fix breaks other corner

STA deep dive

Debug hygiene separates senior STA leads from report readers.

Concept diagram

DEBUG ORDER

1. same tags?  2. constraints?  3. view?  4. real path?  5. ECO

Metric graph

ROOT CAUSE MIX (typical)

constraint bugs  ████████  35%
view mismatch    ██████    25%
real path        ██████    25%
methodology      ████      15%

Reports and artifacts

• run manifest

• SDC diff

• SPEF tag

• scenario isolation

Mini case study

Mystery regression: SPEF corner tag typo in run script — not a design bug.

Debug branches

• Manifest every run

• War room by path group

Senior review question

Ask: what corner/mode/view proves this topic is closed or failing?

Key takeaways

• State corner, mode, view, and database tag with every slack claim.

• Run setup and hold plus MMMC regression after every ECO.

Common pitfalls

• Comparing STA runs with different SPEF or SDC tags.

• Broad false_path to green-wash violations.

• Setup-only ECO without hold check.

Principal STA review addendum

Different SPEF, RC corners, or parasitic modes between runs explain apparent regressions without any design change.

Metric: slack delta between views, SPEF tag mismatch count