Two identical gates on the same die do not have identical delays. Timing analysis must allow for that, because a launch path that is slower than nominal and a capture path that is faster than nominal can both happen on one chip. Three methods of increasing precision exist: a flat derate, a depth-based derate, and statistical (per-cell sigma) analysis. This topic builds each one from numbers and ends with how to choose.
Lesson | After it you can... |
|---|---|
Apply late and early derates and see the cost. | |
Explain why deeper paths need smaller derates. | |
Compute a path's sigma from cell sigmas. | |
Compare the three on the same paths. |
Setup is worst when data arrives late and the capture clock arrives early, so the launch path takes the late derate and the capture clock path the early derate.