Part 11 · Senior Prep · Intermediate

Trade-Off & Disagreement Interview Q&A

Model STAR answers on verification disagreements, speed vs quality trade-offs, waiver disputes, and escalating with data instead of volume.

Disagreement resolution stories

Q: Tell me about a verification disagreement you resolved

diagram

[INT][SENIOR][UVM] MODEL ANSWER (STAR format)

Q: Verification disagreement?

A:
  SITUATION:  Design wanted to waive a cross bin; verification owned plan feature.
  TASK:       Prove reachable or document unreachable with spec cite.
  ACTION:     Reproduced hole with directed seq; design admitted corner valid
              under one config; we added closure test instead of waiver.
  RESULT:     Bin closed in merge; post-silicon bug avoided in related corner.
  SENIOR SIGNAL: data beats opinion; escalate with repro not volume.
  PITFALL ANSWER: "I won the argument" — sounds political, not technical.

Q: Design wants to drop a test to meet schedule — you push back how?

diagram

[INT][SENIOR][UVM] MODEL ANSWER

Q: Drop test for schedule?

A:
  FRAME:      Map test to plan feature and risk if removed.
  ACTION:     Show which bins only that test hits in merged DB; propose shorter
              smoke alternative if runtime is the issue, not removal.
  RESULT:     Kept test in weekly tier, moved out of nightly — schedule saved,
              risk documented in sign-off register.
  SENIOR SIGNAL: negotiate tier change, not silent deletion.
  PITFALL:     Refusing everything without alternative — sounds inflexible.

Q: Two valid approaches — scoreboard in ref model vs standalone — how decide?

diagram

[INT][SENIOR][UVM] MODEL ANSWER

Q: SB architecture trade-off?

A:
  OPTIONS:    (A) ref model inside scoreboard (B) separate predictor + compare.
  CRITERIA:   reuse at chip, debug visibility, team ownership, performance.
  DECISION:   Separate predictor when RAL and SB share monitor stream — single
              owner per concern; combined when block-only and team is small.
  COMMUNICATE: Document in arch review with explicit trade-off matrix.
  PITFALL:    Choosing based on personal preference without written rationale.

diagram

[INT][SENIOR][UVM] trade-off matrix (whiteboard in interview)

  CRITERION          COMBINED SB+RM    SEPARATE PREDICTOR
  chip reuse         low               high
  debug clarity      medium            high (isolated bugs)
  build cost         low               medium
  perf overhead      lower             slightly higher

Key takeaways

Disagreements resolve with repro data — not meeting volume.
Negotiate tier changes — never silently delete coverage-bearing tests.
Document architecture trade-offs in a matrix — shows senior rigor.

Common pitfalls

Story ending with 'they were wrong' — toxic tone.
No measurable result in STAR story — sounds fabricated.

Speed vs quality and cross-team dynamics

Q: Manager pressures sign-off with open P1 holes — your response?

diagram

[INT][SENIOR][UVM] MODEL ANSWER

Q: Pressure sign-off with open holes?

A:
  SITUATION:  Tape-out date fixed; 2 P1 IRQ crosses open.
  TASK:       Present risk without blocking blindly or caving silently.
  ACTION:     Risk memo: scenario, firmware workaround, emulation result,
              post-silicon monitor plan. Request explicit risk acceptance signature.
  RESULT:     VP signed risk on 1 hole; 2nd closed before tape-out with directed test.
  SENIOR SIGNAL: integrity with documented risk acceptance — not heroics or refusal.

Q: How do you disagree with your verification lead?

diagram

[INT][SENIOR][UVM] MODEL ANSWER

Q: Disagree with lead?

A:
  APPROACH:   Private 1:1 with data — merged cov excerpt, repro log, schedule impact.
  ACTION:     Propose experiment: run closure test for 2 days before final decision.
  RESULT:     Lead changed waiver decision after repro showed reachable bin.
  SENIOR SIGNAL: disagree with evidence, commit after decision.
  PITFALL:    Public undermining in standup — career-limiting regardless of correctness.

Q: RTL and TB teams blame each other on mismatch — you facilitate?

diagram

[INT][SENIOR][UVM] MODEL ANSWER

Q: RTL vs TB blame cycle?

A:
  MECHANISM:  Neutral reproducer with minimal config — one test, one seed, one txn.
  ACTION:     Joint debug session: waves + log + spec clause on same screen.
  RESULT:     Turned out byte-strobe mask in monitor — not RTL, not stimulus.
  SENIOR SIGNAL: depersonalize — focus on artifact (log, wave, spec).
  PITFALL:    Taking sides in Slack thread — escalates politics.

systemverilog

// minimal reproducer pattern — cite in disagreement stories
class minimal_repro_test extends uvm_test;
  task run_phase(uvm_phase phase);
    phase.raise_objection(this);
    axi_single_write_seq seq = axi_single_write_seq::type_id::create("seq");
    seq.addr = 32'h1000; seq.data = 32'hDEAD_BEEF;
    seq.start(env.axi_agt.sqr);
    #1us;  // one txn only
    phase.drop_objection(this);
  endtask
endclass

Key takeaways

Sign-off pressure → risk memo + explicit acceptance — not silent cave or block.
Disagree with lead privately using data — commit after team decision.
Blame cycles break with minimal reproducer + joint spec session.

Common pitfalls

Public escalation before private data conversation.
Minimal reproducer with 50 sequences — not minimal.

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