Interview Q&A: Sequence Libraries

[INT][SENIOR][UVM] MODEL ANSWER

Q: uvm_sequence_library?

A:
  MECHANISM:  Container registering multiple sequence types; select_and_send picks
              one (or chain) per invocation based on selection_mode.
  MOTIVATION:  One test entry point, diverse stimulus mix across regression seeds.
  WHEN:       Random regression needs burst mix diversity without 40 separate tests.
  NOT WHEN:   Single directed scenario — plain seq.start() is simpler.
  PITFALL:    Library with one entry — pointless wrapper, use the sequence directly.
  EXAMPLE:    axi_seq_lib.add_sequence(axi_wr_seq); add_sequence(axi_rd_seq);
              select_mode UVM_SEQ_LIB_RAND; lib.start(sqr).

[INT][SENIOR][UVM] MODEL ANSWER

Q: Sequence library selection modes?

A:
  MECHANISM:  UVM_SEQ_LIB_RAND, RANDC, ITEM, USER — controls pick policy per call.
  MOTIVATION:  RAND for general regression; RANDC for coverage of all types before repeat;
              ITEM for index-based directed mix; USER for custom weight function.
  WHEN:       RANDC when each sequence type must run before any repeats (fair coverage).
  PITFALL:    RAND with one heavy sequence dominating statistically — need weights or USER.
  EXAMPLE:    RANDC ensures axi_err_seq runs at least once before any type repeats.

[INT][SENIOR][UVM] MODEL ANSWER

Q: Library registration?

A:
  MECHANISM:  uvm_sequence_library_utils(seq_type) macro + init_sequence library
              build_phase add_sequence/get_type or add_typewide_sequence.
  MOTIVATION:  Factory-aware registration enables override of library member types.
  WHEN:       Env or pkg init_sequence block registers all protocol scenario seqs.
  PITFALL:    Forgetting init_sequence — library empty, select_and_send does nothing.
  EXAMPLE:    uvm_sequence_library_utils(axi_burst_seq)
              function void init_sequence(); add_typewide_sequence(axi_wr_seq); ...

[INT][SENIOR][UVM] library regression flow

  test.run_phase:
    axi_seq_lib.select_sequence(UVM_SEQ_LIB_RANDC);
    repeat (50) axi_seq_lib.start(agt.sequencer);
    // seed 4099 picks different mix than seed 4100

[INT][SENIOR][UVM] MODEL ANSWER

Q: Factory override on library entry?

A:
  MECHANISM:  set_type_override_by_type(orig_seq, err_seq) before lib.start —
              library picks err_seq when it would have picked orig_seq type.
  MOTIVATION:  Error injection test reuses same lib-based regression test.
  WHEN:       axi_err_test overrides axi_wr_seq → axi_wr_err_seq in test build_phase.
  PITFALL:    Override after library already cached types — register in build before start.
  EXAMPLE:    err_test build: set_type_override_by_type(axi_wr_seq::get_type(),
              axi_wr_err_seq::get_type()); then run normal axi_rand_lib_test body.

[INT][SENIOR][UVM] MODEL ANSWER

Q: Library vs one random sequence?

A:
  MECHANISM:  Library composes distinct scenario classes; one big seq randomizes
              knobs inside a single body — less type-level diversity.
  MOTIVATION:  Library enables factory swap per scenario type; clearer coverage mapping.
  WHEN:       Plan maps bins to scenario classes (wr_burst, rd_burst, err_inject).
  NOT WHEN:   Only varying addr/data in one template — single seq sufficient.
  PITFALL:    Giant randomized body with 20 mode bits — untestable, unreviewable.
  EXAMPLE:    Coverage bin 'AXI_ERR_RESP' maps to axi_err_seq in library — traceable.

[INT][SENIOR][UVM] MODEL ANSWER

Q: Library sends wrong scenario?

A:
  MECHANISM:  select_and_send picks by mode + registered set; override may swap types.
  MOTIVATION:  'Wrong traffic' often means unexpected override or RAND picked err seq.
  STEPS:      1) Print get_type_name() of running seq. 2) Dump factory overrides.
              3) Check selection_mode. 4) Verify init_sequence list matches intent.
  PITFALL:    Stale override from base_test leaking into unrelated test.
  EXAMPLE:    UVM_FACTORY trace shows err_seq substituted — left from prior err_test base.

[INT][SENIOR][UVM] MODEL ANSWER

Q: Virtual seq in library?

A:
  MECHANISM:  Library entries are uvm_sequence types; vseq can register if started
              on virtual sequencer — but library usually targets single-agent sqr.
  MOTIVATION:  Chip-level lib of vseqs (smoke_vseq, stress_vseq) started on v_sqr.
  WHEN:       Chip regression picks scenario vseq by RANDC — not agent burst seq.
  PITFALL:    Registering vseq in agent seq_lib started on axi_sqr — wrong sequencer type.
  EXAMPLE:    chip_seq_lib on env.v_sqr: add dma_vseq, pcie_hotplug_vseq, idle_vseq.