Sample Timing Contract: Debug Playbook

Debug playbook

Debug Playbook for Sample Timing Contract focuses on aperture budget compliance, sample alignment error, control-loop jitter. The goal is to connect observed symptom to boundary mechanism, ownership, and signoff risk.

AMS debug is a hunt for first divergence, not downstream symptom management. Most costly delays come from wrong-owner first actions.

Root-cause tree

ROOT-CAUSE TREE — Sample Timing Contract

aperture budget compliance, sample alignment error, control-loop jitter regressed
        |
same silicon / run tags?
   /            \
 no              yes
 |                |
env mismatch    boundary contract or
tag mismatch    true physical issue
 /   \             |
clk   reset      isolate first failing
map   sequence   boundary transition

1. Freeze reproducer: mode, firmware/config, and evidence tags.

2. Find the first boundary signal that diverges.

3. Map divergence to contract clause and owner.

4. Classify failure: contract, sequencing, coupling, package, or tool-view mismatch.

5. Prove mechanism with one reduced reproducer.

6. Apply smallest reversible fix and rerun cross-domain regressions.

Review memo template

STAFF AMS REVIEW MEMO — ADC / DAC Interfaces / Sample Timing Contract

1. Symptom
   - Watched metric: aperture budget compliance, sample alignment error, control-loop jitter
   - Failing mode/condition: <power/clock/temp/workload>
   - Boundary under suspicion: <macro/wrapper/interface/lane/island>
   - Repro setup: <sim/emulation/lab + firmware/config tags>

2. Mechanism hypothesis
   - Primary mechanism: Sampling quality depends on clock phase relationships, aperture uncertainty, and synchronization boundaries between converter clocks and system clocks.
   - Competing hypothesis: <contract gap, sequencing, physical coupling, package, tooling>
   - Missing evidence: <waveform, report, scope/analyzer capture, dashboard snapshot>

3. Proposed action
   - Minimal reversible change: <RTL/config/layout/policy>
   - Expected metric movement: <delta and conditions>
   - Regression risk: timing, noise, power, performance, compatibility

4. Signoff
   - Re-run artifact: timing contract table, phase alignment report, calibration captures
   - Required owners: system architect, timing owner, ADC/DAC owner
   - Final decision: fix, waive with controls, or escalate

AMS deep dive

Wrapper and sampling contracts determine data trustworthiness.

Concept diagram

CONVERTER DATA FLOW

sampling clock -> wrapper -> sync boundary -> system consumer

Metric graph

INVALID SAMPLE BURSTS

time --->  _|¯¯|__|¯¯¯|____|¯|_

Reports and artifacts

• sample validity ratio

• calibration convergence

• CDC audit

• overflow/stale sample counters

Mini case study

Mode transition changed sample phase and invalidated wrapper framing assumptions.

Debug branches

• Sample timing contract

• Calibration hook behavior

• Wrapper CDC integrity

Senior review question

Ask: what boundary condition proves this topic is actually closed?

Key takeaways

• State boundary, mode, and evidence tag with every claim.

• Always align analog, digital, and physical owners before signoff decisions.

Common pitfalls

• Fixing averages while tails still fail.

• Skipping package/supply evidence in jitter or SerDes issues.

• Shipping with waivers that lack owner and expiration criteria.

Principal AMS review addendum

Sampling quality depends on clock phase relationships, aperture uncertainty, and synchronization boundaries between converter clocks and system clocks.

Metric: aperture budget compliance, sample alignment error, control-loop jitter