DenseChip

Computer Architecture · All levels

Architecture Whiteboard Framework

Structured delivery for microarchitecture and system design interviews.

On-call / interview prompt

Design a cache hierarchy for a mobile SoC — how do you open?

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ARCHITECTURE ANALYSIS CHAIN

1. METRIC     — IPC, CPI, MPKI, bandwidth, latency, queue depth, stall cycles
2. HYPOTHESIS — microarch or system cause ordered by likelihood
3. EXPERIMENT — trace, PMU counter, simulation, or RTL probe
4. CHANGE      — pipeline, cache, NoC, or memory hierarchy adjustment
5. VALIDATION  — workload replay, regression suite, PPA impact

Reference workflow

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1. Clarify workload class (mobile burst, sustained, ML inference)
2. State targets: IPC, latency, power, area budget
3. Draw L1I/L1D/L2/L3 + coherence point
4. Size levels using MPKI × penalty math
5. Name validation: benchmark suite + PMU events
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RUBRIC (score 1–5 each)

  Metric clarity — names IPC, latency, bandwidth, or stall source
  Mechanism depth — explains pipeline, cache, NoC, or coherency cause
  Tradeoff quality — states PPA and verification impact
  Validation mindset — names workload and regression checks

STRONG HIRE: METRIC → mechanism → experiment without prompting
NO HIRE: buzzwords without measurable impact

Key takeaways

  • Lead with constraints and metrics, not microarch features you like.

Architecture deep dive

Interview performance is structured metric-first reasoning under time pressure.

Concept diagram

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WHITEBOARD ANSWER SHAPE

1. Workload and metric
2. Block diagram
3. Bottleneck hypothesis tree
4. Experiment plan
5. Design options and tradeoffs
6. Validation / regression

If you skip step 1, the rest sounds generic.

Metric graph

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ANSWER QUALITY LADDER

5/5  metric + mechanism + experiment + tradeoff + validation
4/5  correct mechanism, weak validation
3/5  concept knowledge, no workload
2/5  feature list
1/5  buzzwords

Metrics and artifacts

  • one-slide metric summary

  • block diagram

  • hypothesis list

  • validation workloads

Mini case study

Strong candidates name the workload and baseline IPC before drawing any pipeline stage.

Debug branches

  • If stuck, restate metric and ask for constraints.

  • If pressured, present options with tradeoffs not single answer.

Senior review question

Ask: what single metric would prove this concept is working or failing on your workload?

Key takeaways

  • Connect every architecture claim to a workload and measurable metric.

  • State verification and PPA impact before proposing design changes.

Common pitfalls

  • Feature-driven design without MPKI/IPC/bandwidth evidence.

  • Ignoring coherency and NoC traffic in cache and accelerator sizing.

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