Computer Architecture · All levels

QoS and Arbitration Policies — Design Space Exploration

Design Space Exploration for QoS and Arbitration Policies (NoC and Interconnect Architecture).

Design space exploration

For QoS and Arbitration Policies, senior architects do not pick one answer — they map the design space, estimate metric movement, and choose based on product constraints.

Option A — conservative

Conservative: helps lower risk
Risk: less upside
Validate with: baseline suite

Option B — balanced

Balanced: helps good perf/watt
Risk: may miss peak
Validate with: multi-workload sweep

Option C — aggressive

Aggressive: helps peak wins
Risk: PPA/DV risk
Validate with: stress suite

Option D — software-first

Software-first: helps low silicon
Risk: fragile
Validate with: controlled apps

diagram

DESIGN SPACE — QoS and Arbitration Policies
low risk -> balanced -> aggressive
with software-first as alternate axis

Common pitfalls

Aggressive hardware before workload proof
Balanced by habit without numbers

Architecture deep dive

NoC is a queueing system — bandwidth, latency, and deadlock are coupled.

Concept diagram

diagram

NoC TOPOLOGY SKETCH

CPU0 ──┐      ┌── LLC0 ── DRAM0
       R0 ─── R1
CPU1 ──┘      │
              R2 ─── R3 ── GPU/DMA
              │      │
             NPU    LLC1 ── DRAM1

Look for: hot links, cyclic dependencies, VC starvation, and tail latency.

Metric graph

diagram

LATENCY DISTRIBUTION

p50    ██████  32 ns
p90    ████████████  71 ns
p99    ████████████████████████  210 ns
p99.9  █████████████████████████████████  480 ns

Averages hide QoS failures.

Metrics and artifacts

link utilization
average latency by master
retry/backpressure counts
QoS violation log

Mini case study

Average latency looks fine but tail latency spikes for CPU coherent reads when GPU DMA runs. QoS and separate VCs fix the starvation without doubling link width.

Debug branches

If deadlock, check credit loops and routing restrictions first.
If latency tail long, inspect arbitration and buffer depth.

Senior review question

Ask: what single metric would prove this concept is working or failing on your workload?

Key takeaways

Connect every architecture claim to a workload and measurable metric.
State verification and PPA impact before proposing design changes.

Common pitfalls

Feature-driven design without MPKI/IPC/bandwidth evidence.
Ignoring coherency and NoC traffic in cache and accelerator sizing.

Study notes

Re-read this topic with one concrete workload.

Practice this lesson