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Course contents

  • How to Use This Course
  • Reading Path
  • CDC/RDC Glossary
  • CDC/RDC Metrics Reference
  • CDC/RDC Interview Prep
  • CDC/RDC Signoff Cheatsheet
  • Clock Domains and Failure Modes8
  • Metastability and Synchronizers16
  • CDC Protocols and Handshakes16
  • Reconvergence and Gray Coding16
  • Reset Domain Crossing16
  • Architecture and Design Rules16
  • CDC Signoff Methodology24
  • RDC Signoff16
  • Debug and Case Studies11
  • CDC and RDC Interview Prep30
    • CDC/RDC Whiteboard Framework
    • CDC/RDC Framework Drills
    • Scenario: Metastability Bug
    • Scenario: Metastability Escape in Silicon Bring-up
    • Scenario: Async FIFO Pointer Mismatch
    • Scenario: Waiver Debate
      • The Scenario
      • Arguments For and Against
      • A Defensible Outcome
    • Scenario: RDC Waiver Under Tapeout Pressure
    • CDC/RDC Interview Q&A Bank
    • CDC/RDC Interview Q&A Bank (Expanded)
  • Capstone: Sign Off a Multi-clock Peripheral4
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‹Scenario: Waiver Debate
  1. Topics
  2. CDC & RDC
  3. CDC and RDC Interview Prep
  4. Scenario: Waiver Debate
  5. Arguments For and Against

Part 10 · Interview Prep · All levels

Arguments For and Against

The strongest case for the waiver and the strongest case against it, each with its evidence demand.

On this page

    Argue both sides at full strength: a steelman that collapses on contact proves nothing. Each side below ends with the evidence that would settle it.

    For the waiver

    The bus genuinely changes only during initialisation in every system scenario the team knows; adding a synchroniser now touches frozen RTL near tape-out, and every edit carries regression risk; the destination samples the bus only when enabled by sequenced control, so even a torn sample may never propagate. The evidence demand: a constraint or assertion proving the bus stable across every destination sample, plus a review of the register interface confirming no runtime write path. If that proof exists, the waiver is cheap and honest.

    Against the waiver

    No party enforces stability: the interface permits runtime writes, no constraint forbids them, and no qualification gate holds the destination while the bus moves. A torn sample into datapath control is silent corruption, not a flagged error, and field software will eventually use the permitted write path the hardware left open. The evidence demand: show the enforcement, not the intention. Absent enforcement, the "quasi-static" label is unreviewed optimism one ECO away from a respin. The anti-pattern catalogue in Waiver Anti-Patterns lists this exact shape.

    What the exchange tests

    Whether you can hold two technical positions without caricaturing either, and whether your verdict follows the evidence rather than the org chart. The common trap is deciding by seniority: the designer's experience, or the verification lead's caution, treated as technical input. Neither is evidence. Say so: "I respect both positions, and neither is a check result."

    Common pitfall

    Proposing a synchroniser as the compromise without costing it. If the proof path is cheaper and sufficient, the synchroniser is schedule theatre; if the proof is impossible, say which enforcement is missing instead of waving at "more synchronisation".

    Check yourself The designers produce a system-level test showing no runtime writes in all current scenarios. Does the waiver pass?

    Not yet: scenarios describe current software, not the permitted hardware interface. The evidence must forbid runtime writes structurally, or qualify the capture, otherwise the next software release reopens the hole.

    Related topics

    • Next: A Defensible Outcome

    • Constraints and waiver hygiene

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