CDC / RDC · All levels
MTBF & Synchronizer Math: Review Checklist
Review Checklist for MTBF & Synchronizer Math.
Review checklist
Review Checklist for MTBF & Synchronizer Math focuses on MTBF target vs product FIT budget, synchronizer latency budget. The goal is to convert issue observations into mechanism-backed closure decisions.
Crossing and reset intent are explicitly classified.
Protocol assumptions are documented and checked.
Critical issues have owners and dates.
Waivers include mechanism, containment, and expiry.
Regression matrix includes stress and milestone modes.
Owners signed: CDC owner, library owner, architecture owner.
Signoff ownership
OWNERSHIP MAP — MTBF & Synchronizer Math
artifact owner
---------------------- -------------------------
design intent CDC owner
verification evidence library owner
signoff decision architecture owner
Every open CDC/RDC issue needs one accountable owner before waiver or fix.CDC/RDC deep dive
Metastability is managed risk, not eliminated risk.
Concept diagram
METASTABILITY FLOW
async event -> first sample may metastabilize
-> settle window
-> downstream sample confidenceMetric graph
MTBF TREND
target MTBF ---------
current design ____/Reports and artifacts
MTBF assumptions
synchronizer inventory
crossing class summary
critical waivers
Mini case study
Pulse sync chosen for a level signal caused intermittent stuck state under voltage stress.
Debug branches
Validate crossing class first
Check pulse width assumptions
Audit synchronizer template usage
Senior review question
Ask: what evidence proves this risk is closed for silicon, not just tool-clean?
Key takeaways
State crossing class, assumptions, and owner with every issue.
Run structural and dynamic regressions after each fix.
Common pitfalls
Treating all warnings as equivalent risk.
Waiving issues without containment evidence.
Skipping reset and reconvergence stress after CDC fixes.
Principal CDC/RDC review addendum
Metastability cannot be eliminated, only pushed beyond mission lifetime by adequate settle time, stage count, and frequency-aware design.
Metric: MTBF target vs product FIT budget, synchronizer latency budget