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Course contents

  • How to Use This Course
  • Reading Path
  • CDC/RDC Glossary
  • CDC/RDC Metrics Reference
  • CDC/RDC Interview Prep
  • CDC/RDC Signoff Cheatsheet
  • Clock Domains and Failure Modes8
  • Metastability and Synchronizers16
    • MTBF & Synchronizer Math
      • Metastability Mechanism
      • Resolution Time and MTBF
      • Worked MTBF Example
      • Two or Three Stages
    • Two-Flop Synchronizers in Practice
    • Multi-bit CDC Hazards
    • Synchronizer Selection Guide
  • CDC Protocols and Handshakes16
  • Reconvergence and Gray Coding16
  • Reset Domain Crossing16
  • Architecture and Design Rules16
  • CDC Signoff Methodology24
  • RDC Signoff16
  • Debug and Case Studies11
  • CDC and RDC Interview Prep30
  • Capstone: Sign Off a Multi-clock Peripheral4
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‹MTBF & Synchronizer Math
  1. Topics
  2. CDC & RDC
  3. Metastability and Synchronizers
  4. MTBF & Synchronizer Math
  5. Resolution Time and MTBF

Part 2 · Metastability and Synchronizers · All levels

Resolution Time and MTBF

The exponential-resolution MTBF model: what each term means and which levers move the result.

On this page

    Mean time between failures (MTBF) answers one question: if this crossing runs forever, how often does an unresolved flop escape into the design? The standard model says the answer is dominated by a single exponential in the resolution time.

    MTBF=TW​⋅fclk​⋅fdata​etr​/τ​

    Term

    Meaning

    t_r

    Resolution time: how long the first flop has to settle before the second stage samples it (about one destination clock period, minus clock-to-Q and setup).

    τ

    Regeneration time constant of the flop: how fast its feedback pushes a balanced state apart. A flop property, smaller is better.

    T_W

    Width of the vulnerable window around the clock edge. A flop property.

    f_clk

    Destination clock frequency: how often the flop samples.

    f_data

    Average rate of data changes arriving at the flop.

    Reading the model

    The numerator is everything. Each extra τ of settling time multiplies MTBF by e (about 2.72), so one more clock period of resolution time multiplies MTBF by an enormous factor. The denominator matters only linearly: doubling the clock or the data rate merely halves MTBF.

    That asymmetry drives every synchroniser decision. You cannot change τ or T_W from RTL; they belong to the chosen flop and its operating conditions. What RTL controls is t_r: the number of destination clock periods the first flop gets before its output is used, which is exactly the number of synchroniser stages minus one.

    What reviewers check

    A structural tool generally does not compute your MTBF, and no reviewer expects a number. The review checks the qualitative consequences of the model: enough settling time for the clock speed (the stage count policy), a synchroniser flop with good regeneration behaviour from the library, and data activity within what the analysis assumed.

    Common pitfall

    Faster clocks hurt twice: the sampling rate in the denominator rises and the resolution time in the exponent shrinks. A stage count that is comfortable at a few hundred MHz can be marginal near 1 GHz for this double reason.

    Interview

    “What moves MTBF?” Answer in two layers: exponentially, the resolution time over τ; linearly, the window, clock, and data rates. Then add that RTL controls only the resolution time, via stage count.

    Check yourself Two identical crossings differ only in data rate: one changes ten times as often. How do their MTBFs compare?

    The busier crossing has one tenth the MTBF. Data rate sits in the denominator, so its effect is linear, not exponential.

    Check yourself A redesign shortens the destination clock period by 20% with the same two stages. Does MTBF fall by about 20%?

    No, it falls far more: t_r shrinks by nearly 20% of a period, which is many τ, so the exponential numerator collapses. The denominator's 20% rise is negligible beside it.

    Related topics

    • Worked MTBF Example

    • Two or Three Stages

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    See also

    • Two or Three Stages