Digital logic and basic CMOS intuition (from RTL foundations or equivalent).
Read /topics/rtl/timing/sta-intro for setup/hold definitions before timing-closure section.
Familiarity with any PnR tool (Innovus, ICC2, OpenROAD) helps but course stays tool-agnostic.
Read one lesson — copy the on-call prompt into your notes (10 min).
Close the page; write METRIC → HYPOTHESIS → FIX for that scenario (15 min).
Read pitfalls and smoke check; answer 3 Q&A aloud when section Q&A exists (10 min).
Optional: sketch floorplan or timing report annotations on paper (10 min).
This topics course does not require a live PnR license for reading. Use report snippets and maps in lessons to practice interpretation. Tool labs may be added later as optional worksheets.
Answer with MECHANISM + PITFALL + WHEN structure.
Every question has a follow-up trap — practice the trap response aloud.
Record yourself — senior interviews test communication under ambiguity.
Closure narratives beat memorizing vendor command lists.
Cross-link RTL timing for theory; stay in this course for implementation fixes.
For each page, write a one-slide closure note: metric, hypothesis, experiment, fix, and regression. This makes the course feel like an on-call debug notebook rather than a glossary.
Can you explain the metric without using a tool command?
Can you name the owner of the next experiment?
Can you say what could regress after your fix?
Lesson pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.
Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.
Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.
Chooses experiments by information gain and reversibility, not by habit.
States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.
Turns recurring failures into methodology guardrails, dashboards, or checklist items.
STAFF / PRINCIPAL CLOSURE NOTE
Context:
stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
tag: <database / netlist / SDC / library stack>
failing metric: <exact report line>
affected scope: <block / hierarchy / path group / power domain / region>
Hypotheses:
H1: <most likely physical or constraint mechanism>
H2: <competing explanation>
H3: <methodology or input-data issue>
Decision:
next experiment: <cheap check that can falsify H1>
fix candidate: <minimal reversible change>
rollback trigger: <metric that says the fix is wrong>
regression set: <timing / route / power / PV / DFT / package>
escalation owner: <team or reviewer>Interview performance is structured closure thinking under time pressure. Explain not only the preferred fix, but what margin or schedule you are spending to get it.
What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?
Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?
What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?
"The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."Always connect the concept back to a measurable signoff artifact.
A fix is not complete until you can name the regression checks.
Optimizing by habit instead of reading the current report.
Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.