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Course contents

  • How to Use This Course
  • PD Flow Overview — RTL to GDSII
  • Data & Libraries — What PD Receives
  • Data and Libraries49
  • Floorplanning Expanded65
  • Power Planning57
  • Placement65
  • Clock Tree Synthesis57
  • Routing65
    • Global and Detailed Routing Convergence
    • Antenna Rules and Corrective Strategies
    • Metal Layer Planning and Capacity Management
    • Shielding, Tie Cells, and Signal Hygiene
    • Via Planning and Via Ladder Reliability
    • Route-Driven Timing Optimization
    • Special Nets and Power Routing Strategy
    • Routing DRC Debug and Forensic Workflow
    • Routing Tricky Q&A
  • Timing Closure81
  • Signal Integrity and Variation41
  • Power Signoff57
  • Physical Verification65
  • Physical Design Integration49
  • Signoff and Tapeout49
  • PD Interview Prep5
  • PD Closure Cheat Sheet
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‹Physical Design
  1. Topics
  2. Physical Design
  3. Routing

Physical Design · All levels

Routing

Expanded routing registry covering global/detail convergence, antenna control, metal/via strategy, special nets, timing-driven route optimization, and DRC forensic debug.

  • 9topics
  • 65lessons

Topics in this section

  1. 1Global and Detailed Routing Convergence8 lessons
    • Global and Detailed Routing Convergence — Mechanism
    • Global and Detailed Routing Convergence — Inputs & Outputs
    • Global and Detailed Routing Convergence — Reports & Metrics
    • Global and Detailed Routing Convergence — Debug Playbook
    • Global and Detailed Routing Convergence — Worked Example
    • Global and Detailed Routing Convergence — Pitfalls & Red Flags
    • Global and Detailed Routing Convergence — Interview Drills
    • Global and Detailed Routing Convergence — Review Checklist
  2. 2Antenna Rules and Corrective Strategies8 lessons
    • Antenna Rules and Corrective Strategies — Mechanism
    • Antenna Rules and Corrective Strategies — Inputs & Outputs
    • Antenna Rules and Corrective Strategies — Reports & Metrics
    • Antenna Rules and Corrective Strategies — Debug Playbook
    • Antenna Rules and Corrective Strategies — Worked Example
    • Antenna Rules and Corrective Strategies — Pitfalls & Red Flags
    • Antenna Rules and Corrective Strategies — Interview Drills
    • Antenna Rules and Corrective Strategies — Review Checklist
  3. 3Metal Layer Planning and Capacity Management8 lessons
    • Metal Layer Planning and Capacity Management — Mechanism
    • Metal Layer Planning and Capacity Management — Inputs & Outputs
    • Metal Layer Planning and Capacity Management — Reports & Metrics
    • Metal Layer Planning and Capacity Management — Debug Playbook
    • Metal Layer Planning and Capacity Management — Worked Example
    • Metal Layer Planning and Capacity Management — Pitfalls & Red Flags
    • Metal Layer Planning and Capacity Management — Interview Drills
    • Metal Layer Planning and Capacity Management — Review Checklist
  4. 4Shielding, Tie Cells, and Signal Hygiene8 lessons
    • Shielding, Tie Cells, and Signal Hygiene — Mechanism
    • Shielding, Tie Cells, and Signal Hygiene — Inputs & Outputs
    • Shielding, Tie Cells, and Signal Hygiene — Reports & Metrics
    • Shielding, Tie Cells, and Signal Hygiene — Debug Playbook
    • Shielding, Tie Cells, and Signal Hygiene — Worked Example
    • Shielding, Tie Cells, and Signal Hygiene — Pitfalls & Red Flags
    • Shielding, Tie Cells, and Signal Hygiene — Interview Drills
    • Shielding, Tie Cells, and Signal Hygiene — Review Checklist
  5. 5Via Planning and Via Ladder Reliability8 lessons
    • Via Planning and Via Ladder Reliability — Mechanism
    • Via Planning and Via Ladder Reliability — Inputs & Outputs
    • Via Planning and Via Ladder Reliability — Reports & Metrics
    • Via Planning and Via Ladder Reliability — Debug Playbook
    • Via Planning and Via Ladder Reliability — Worked Example
    • Via Planning and Via Ladder Reliability — Pitfalls & Red Flags
    • Via Planning and Via Ladder Reliability — Interview Drills
    • Via Planning and Via Ladder Reliability — Review Checklist
  6. 6Route-Driven Timing Optimization8 lessons
    • Route-Driven Timing Optimization — Mechanism
    • Route-Driven Timing Optimization — Inputs & Outputs
    • Route-Driven Timing Optimization — Reports & Metrics
    • Route-Driven Timing Optimization — Debug Playbook
    • Route-Driven Timing Optimization — Worked Example
    • Route-Driven Timing Optimization — Pitfalls & Red Flags
    • Route-Driven Timing Optimization — Interview Drills
    • Route-Driven Timing Optimization — Review Checklist
  7. 7Special Nets and Power Routing Strategy8 lessons
    • Special Nets and Power Routing Strategy — Mechanism
    • Special Nets and Power Routing Strategy — Inputs & Outputs
    • Special Nets and Power Routing Strategy — Reports & Metrics
    • Special Nets and Power Routing Strategy — Debug Playbook
    • Special Nets and Power Routing Strategy — Worked Example
    • Special Nets and Power Routing Strategy — Pitfalls & Red Flags
    • Special Nets and Power Routing Strategy — Interview Drills
    • Special Nets and Power Routing Strategy — Review Checklist
  8. 8Routing DRC Debug and Forensic Workflow8 lessons
    • Routing DRC Debug and Forensic Workflow — Mechanism
    • Routing DRC Debug and Forensic Workflow — Inputs & Outputs
    • Routing DRC Debug and Forensic Workflow — Reports & Metrics
    • Routing DRC Debug and Forensic Workflow — Debug Playbook
    • Routing DRC Debug and Forensic Workflow — Worked Example
    • Routing DRC Debug and Forensic Workflow — Pitfalls & Red Flags
    • Routing DRC Debug and Forensic Workflow — Interview Drills
    • Routing DRC Debug and Forensic Workflow — Review Checklist
  9. 9Routing Tricky Q&A1 lesson
On this page

    Section goal

    Achieve manufacturable, timing-clean connectivity with controlled DRC, SI, and EM risk across all route classes.

    Mechanism to narrate

    • Global route health predicts detailed route convergence and ECO effort.

    • Antenna, via, and special-net strategy must be planned before brute-force cleanup.

    • Routing closure is proven through category-wise DRC reduction and stable extraction-based timing.

    Senior course bar for this section

    • Every topic should end with a signoff decision, not only concept recall.

    • Every fix should state expected metric movement and likely regression surface.

    • Every open assumption should have an owner, tag, and review date.

    • Every recurring issue should become a methodology guardrail or checklist item.

    1. global-detailed-routing/ — Global and Detailed Routing Convergence

    2. antenna-rules-fixes/ — Antenna Rules and Corrective Strategies

    3. metal-layer-planning/ — Metal Layer Planning and Capacity Management

    4. shielding-tie-cells/ — Shielding, Tie Cells, and Signal Hygiene

    5. via-planning-and-via-ladders/ — Via Planning and Via Ladder Reliability

    6. route-driven-timing-optimization/ — Route-Driven Timing Optimization

    7. special-nets-and-power-routing/ — Special Nets and Power Routing Strategy

    8. routing-drc-debug/ — Routing DRC Debug and Forensic Workflow

    Related topics

    • Clock Tree Synthesis hub

    • Timing Closure hub

    Key takeaways

    • Treat routing as an evidence loop: classify violations, apply systemic fixes, and validate with extraction-backed reports.

    Detailed section notes

    Routing decides whether the placed design is manufacturable and extractable.

    Reports and artifacts to inspect

    • global route overflow by layer and region

    • detailed route DRC/DRV summary grouped by rule

    • antenna report: gate area, metal area, ratio, suggested diode

    • post-route extraction delta on critical nets

    Mini case study

    Detailed route completes with 4,000 spacing violations around a macro channel. The design is not 'routed'. Cluster by rule and region, fix the channel or layer plan, then re-route locally.

    Debug branches

    • If antenna violations cluster on long lower-metal routes, jump to upper metal earlier or insert diode cells.

    • If via violations dominate, inspect via arrays and preferred via stacks, especially on power transitions.

    • If crosstalk worsens timing, space, shield, or layer-promote the victim nets.

    Senior review question

    Ask yourself: what single report line would prove this page's concept is either passing or failing?

    What changes at 10+ years

    • You are expected to predict what your fix can break before running it.

    • You should recognize when the issue is methodology, not one block's implementation.

    • You should communicate risk in tapeout language: owner, evidence, impact, mitigation, and decision date.

    Principal-level review bar

    Hub pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.

    What excellent looks like

    • Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.

    • Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.

    • Chooses experiments by information gain and reversibility, not by habit.

    • States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.

    • Turns recurring failures into methodology guardrails, dashboards, or checklist items.

    Closure note template

    Diagram
    STAFF / PRINCIPAL CLOSURE NOTE
    
    Context:
      stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
      tag: <database / netlist / SDC / library stack>
      failing metric: <exact report line>
      affected scope: <block / hierarchy / path group / power domain / region>
    
    Hypotheses:
      H1: <most likely physical or constraint mechanism>
      H2: <competing explanation>
      H3: <methodology or input-data issue>
    
    Decision:
      next experiment: <cheap check that can falsify H1>
      fix candidate: <minimal reversible change>
      rollback trigger: <metric that says the fix is wrong>
      regression set: <timing / route / power / PV / DFT / package>
      escalation owner: <team or reviewer>

    Tradeoffs a senior engineer must discuss

    Technical tradeoff

    Routing decides whether the placed design is manufacturable and extractable. Explain not only the preferred fix, but what margin or schedule you are spending to get it.

    Cross-team tradeoff

    • What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?

    • Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?

    • What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?

    Leadership communication

    Diagram
    "The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."

    Key takeaways

    • Always connect the concept back to a measurable signoff artifact.

    • A fix is not complete until you can name the regression checks.

    Common pitfalls

    • Optimizing by habit instead of reading the current report.

    • Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.

    PreviousNext: Clock Gating Implementation in CTS

    Up next

    Up nextClock Gating Implementation in CTS

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    See also

    • How to Use This Course
    • PD Flow Overview — RTL to GDSII
    • Data & Libraries — What PD Receives