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Course contents

  • How to Use This Course
  • PD Flow Overview — RTL to GDSII
  • Data & Libraries — What PD Receives
  • Data and Libraries49
  • Floorplanning Expanded65
  • Power Planning57
  • Placement65
  • Clock Tree Synthesis57
  • Routing65
    • Global and Detailed Routing Convergence
    • Antenna Rules and Corrective Strategies
    • Metal Layer Planning and Capacity Management
      • Metal Layer Planning and Capacity Management — Mechanism
      • Metal Layer Planning and Capacity Management — Inputs & Outputs
      • Metal Layer Planning and Capacity Management — Reports & Metrics
      • Metal Layer Planning and Capacity Management — Debug Playbook
      • Metal Layer Planning and Capacity Management — Worked Example
      • Metal Layer Planning and Capacity Management — Pitfalls & Red Flags
      • Metal Layer Planning and Capacity Management — Interview Drills
      • Metal Layer Planning and Capacity Management — Review Checklist
    • Shielding, Tie Cells, and Signal Hygiene
    • Via Planning and Via Ladder Reliability
    • Route-Driven Timing Optimization
    • Special Nets and Power Routing Strategy
    • Routing DRC Debug and Forensic Workflow
    • Routing Tricky Q&A
  • Timing Closure81
  • Signal Integrity and Variation41
  • Power Signoff57
  • Physical Verification65
  • Physical Design Integration49
  • Signoff and Tapeout49
  • PD Interview Prep5
  • PD Closure Cheat Sheet
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‹Routing
  1. Topics
  2. Physical Design
  3. Routing
  4. Metal Layer Planning and Capacity Management

Physical Design · All levels

Metal Layer Planning and Capacity Management

Metal Layer Planning and Capacity Management — physical design implementation and signoff.

  • 8topics
  • 8lessons

Topics in this section

  1. 1Metal Layer Planning and Capacity Management — Mechanism1 lesson
  2. 2Metal Layer Planning and Capacity Management — Inputs & Outputs1 lesson
  3. 3Metal Layer Planning and Capacity Management — Reports & Metrics1 lesson
  4. 4Metal Layer Planning and Capacity Management — Debug Playbook1 lesson
  5. 5Metal Layer Planning and Capacity Management — Worked Example1 lesson
  6. 6Metal Layer Planning and Capacity Management — Pitfalls & Red Flags1 lesson
  7. 7Metal Layer Planning and Capacity Management — Interview Drills1 lesson
  8. 8Metal Layer Planning and Capacity Management — Review Checklist1 lesson
On this page

    On-call / interview prompt

    Critical buses are missing timing while lower metals are saturated. How do you redesign layer assignments without destabilizing whole-chip route?

    Diagram
    CLOSURE CHAIN
    
    1. METRIC     — name the failing report line (WNS, DRV, DRC count, IR %)
    2. HYPOTHESIS — 2–3 likely causes ordered by probability
    3. EXPERIMENT — one cheap check (corner, clock, report, map)
    4. FIX        — minimal physical or constraint change
    5. REGRESSION — what you re-run and what must not regress

    Topic overview

    Plan layer usage, preferred directions, and route class allocation to reduce RC delay and congestion conflicts.

    Mechanism to narrate

    • Section: Routing

    • Primary artifact: see Reports subpage

    • Downstream dependency: Post-route optimization and EM closure quality depend on layer discipline.

    Staff/principal ownership model

    Own Metal Layer Planning and Capacity Management as a release decision, not a page of notes. A senior PD engineer names the metric, the physical mechanism, the cross-team dependency, and the smallest evidence-producing experiment.

    Diagram
    STAFF REVIEW MEMO — Routing / Metal Layer Planning and Capacity Management
    
    1. Current state
       - Failing / watched metric: Routing closure dashboard
       - Database tag, corner/mode, tool version: <fill before review>
       - Physical scope: block, hierarchy, macro region, clock domain, or net class
    
    2. Root-cause hypothesis
       - Most likely mechanism: <name physical or constraint mechanism>
       - Competing hypothesis: <name the second plausible cause>
       - Evidence still missing: <report/map/schematic/check>
    
    3. Proposed action
       - Minimal reversible fix: <physical, constraint, ECO, or methodology change>
       - Expected improvement: <metric delta>
       - Regression risk: Weak layer planning causes avoidable delay, SI noise, and route deadlocks.
    
    4. Regression and signoff
       - Re-run: Routing closure dashboard
       - Must not regress: Post-route optimization and EM closure quality depend on layer discipline.
       - Decision owner: PD owner

    Sub-lessons in this topic

    1. mechanism — Mechanism

    2. inputs-outputs — Inputs & Outputs

    3. reports — Reports & Metrics

    4. debug-playbook — Debug Playbook

    5. worked-example — Worked Example

    6. pitfalls — Pitfalls & Red Flags

    7. interview — Interview Drills

    8. checklist — Review Checklist

    Related topics

    • Routing hub

    Key takeaways

    • Master Metal Layer Planning and Capacity Management through reports, not GUI habit.

    Deep dive: how this shows up in real closure

    Routing decides whether the placed design is manufacturable and extractable.

    Reports and artifacts to inspect

    • global route overflow by layer and region

    • detailed route DRC/DRV summary grouped by rule

    • antenna report: gate area, metal area, ratio, suggested diode

    • post-route extraction delta on critical nets

    Mini case study

    Detailed route completes with 4,000 spacing violations around a macro channel. The design is not 'routed'. Cluster by rule and region, fix the channel or layer plan, then re-route locally.

    Debug branches

    • If antenna violations cluster on long lower-metal routes, jump to upper metal earlier or insert diode cells.

    • If via violations dominate, inspect via arrays and preferred via stacks, especially on power transitions.

    • If crosstalk worsens timing, space, shield, or layer-promote the victim nets.

    Senior review question

    Ask yourself: what single report line would prove this page's concept is either passing or failing?

    What changes at 10+ years

    • You are expected to predict what your fix can break before running it.

    • You should recognize when the issue is methodology, not one block's implementation.

    • You should communicate risk in tapeout language: owner, evidence, impact, mitigation, and decision date.

    Principal-level review bar

    Lesson pages in this course should be read like real closure review material. For a 10+ year PD engineer, the bar is not remembering terminology; it is making a release-quality decision under ambiguity.

    What excellent looks like

    • Names the failing metric, corner/mode, database tag, and analysis switches before proposing a fix.

    • Separates data, constraint, physical, tool, and methodology root causes instead of treating all failures as optimization problems.

    • Chooses experiments by information gain and reversibility, not by habit.

    • States regression blast radius across timing, route, power, PV, DFT, package, and tapeout manifest.

    • Turns recurring failures into methodology guardrails, dashboards, or checklist items.

    Closure note template

    Diagram
    STAFF / PRINCIPAL CLOSURE NOTE
    
    Context:
      stage: <pre-CTS | post-CTS | post-route | post-fill | signoff>
      tag: <database / netlist / SDC / library stack>
      failing metric: <exact report line>
      affected scope: <block / hierarchy / path group / power domain / region>
    
    Hypotheses:
      H1: <most likely physical or constraint mechanism>
      H2: <competing explanation>
      H3: <methodology or input-data issue>
    
    Decision:
      next experiment: <cheap check that can falsify H1>
      fix candidate: <minimal reversible change>
      rollback trigger: <metric that says the fix is wrong>
      regression set: <timing / route / power / PV / DFT / package>
      escalation owner: <team or reviewer>

    Tradeoffs a senior engineer must discuss

    Technical tradeoff

    Routing decides whether the placed design is manufacturable and extractable. Explain not only the preferred fix, but what margin or schedule you are spending to get it.

    Cross-team tradeoff

    • What must RTL, synthesis, CAD, STA, DFT, package, IP, or foundry agree to before this decision is final?

    • Which artifact becomes the source of truth after the decision: report, waiver, manifest, ECO script, or methodology deck?

    • What is the cost of being wrong: one rerun, ECO churn, mask risk, performance loss, or silicon escape?

    Leadership communication

    Diagram
    "The current blocker is <metric> in <corner/mode/stage>. The leading cause is <mechanism>. I recommend <fix> because it is bounded and reversible. The regression surface is <domains>. If it fails, we escalate to <owner> with <evidence>."

    Key takeaways

    • Always connect the concept back to a measurable signoff artifact.

    • A fix is not complete until you can name the regression checks.

    Common pitfalls

    • Optimizing by habit instead of reading the current report.

    • Forgetting that a local fix can regress timing, routing, power, or PV elsewhere.

    PreviousNext: Multi-Clock Domain CTS Architecture

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    Up nextMulti-Clock Domain CTS Architecture

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    See also

    • Global and Detailed Routing Convergence
    • Antenna Rules and Corrective Strategies
    • Shielding, Tie Cells, and Signal Hygiene